i915: Fix GR register array size off-by-one bug

Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).

Noticed-by: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Jesse Barnes 2008-02-07 11:15:20 -08:00 committed by Linus Torvalds
parent 0afc2edfad
commit 123f794fa7
1 changed files with 1 additions and 1 deletions

View File

@ -187,7 +187,7 @@ typedef struct drm_i915_private {
u32 saveSWF2[3];
u8 saveMSR;
u8 saveSR[8];
u8 saveGR[24];
u8 saveGR[25];
u8 saveAR_INDEX;
u8 saveAR[20];
u8 saveDACMASK;