ncr5380: Use runtime register mapping
Convert compile-time C400_ register mapping to runtime mapping. This removes the weird negative register offsets and allows adding additional mappings. While at it, convert read/write loops into insb/outsb. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Ondrej Zary
Martin K. Petersen
parent
f03946210d
commit
12150797d0
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@ -163,8 +163,7 @@
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/* Write any value to this register to start an ini mode DMA receive */
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#define START_DMA_INITIATOR_RECEIVE_REG 7 /* wo */
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#define C400_CONTROL_STATUS_REG NCR53C400_register_offset-8 /* rw */
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/* NCR 53C400(A) Control Status Register bits: */
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#define CSR_RESET 0x80 /* wo Resets 53c400 */
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#define CSR_53C80_REG 0x80 /* ro 5380 registers busy */
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#define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */
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@ -181,16 +180,6 @@
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#define CSR_BASE CSR_53C80_INTR
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#endif
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/* Number of 128-byte blocks to be transferred */
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#define C400_BLOCK_COUNTER_REG NCR53C400_register_offset-7 /* rw */
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/* Resume transfer after disconnect */
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#define C400_RESUME_TRANSFER_REG NCR53C400_register_offset-6 /* wo */
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/* Access to host buffer stack */
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#define C400_HOST_BUFFER NCR53C400_register_offset-4 /* rw */
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/* Note : PHASE_* macros are based on the values of the STATUS register */
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#define PHASE_MASK (SR_MSG | SR_CD | SR_IO)
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@ -253,6 +253,7 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
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};
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int flags;
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struct Scsi_Host *instance;
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struct NCR5380_hostdata *hostdata;
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#ifdef SCSI_G_NCR5380_MEM
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unsigned long base;
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void __iomem *iomem;
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@ -394,6 +395,7 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
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instance = scsi_register(tpnt, sizeof(struct NCR5380_hostdata));
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if (instance == NULL)
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goto out_release;
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hostdata = shost_priv(instance);
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#ifndef SCSI_G_NCR5380_MEM
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instance->io_port = overrides[current_override].NCR5380_map_name;
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@ -403,18 +405,27 @@ static int __init generic_NCR5380_detect(struct scsi_host_template *tpnt)
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* On NCR53C400 boards, NCR5380 registers are mapped 8 past
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* the base address.
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*/
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if (overrides[current_override].board == BOARD_NCR53C400)
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if (overrides[current_override].board == BOARD_NCR53C400) {
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instance->io_port += 8;
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hostdata->c400_ctl_status = 0;
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hostdata->c400_blk_cnt = 1;
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hostdata->c400_host_buf = 4;
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}
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#else
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instance->base = overrides[current_override].NCR5380_map_name;
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((struct NCR5380_hostdata *)instance->hostdata)->iomem = iomem;
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hostdata->iomem = iomem;
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if (overrides[current_override].board == BOARD_NCR53C400) {
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hostdata->c400_ctl_status = 0x100;
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hostdata->c400_blk_cnt = 0x101;
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hostdata->c400_host_buf = 0x104;
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}
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#endif
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if (NCR5380_init(instance, flags))
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goto out_unregister;
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if (overrides[current_override].board == BOARD_NCR53C400)
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NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
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NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
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NCR5380_maybe_reset_bus(instance);
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@ -522,31 +533,25 @@ generic_NCR5380_biosparam(struct scsi_device *sdev, struct block_device *bdev,
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static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst, int len)
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{
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#ifdef SCSI_G_NCR5380_MEM
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struct NCR5380_hostdata *hostdata = shost_priv(instance);
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#endif
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int blocks = len / 128;
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int start = 0;
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int bl;
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NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE | CSR_TRANS_DIR);
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NCR5380_write(C400_BLOCK_COUNTER_REG, blocks);
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NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
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NCR5380_write(hostdata->c400_blk_cnt, blocks);
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while (1) {
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if ((bl = NCR5380_read(C400_BLOCK_COUNTER_REG)) == 0) {
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if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
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break;
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}
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if (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_GATED_53C80_IRQ) {
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if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
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printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
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return -1;
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}
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while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_HOST_BUF_NOT_RDY);
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while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
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; /* FIXME - no timeout */
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#ifndef SCSI_G_NCR5380_MEM
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{
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int i;
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for (i = 0; i < 128; i++)
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dst[start + i] = NCR5380_read(C400_HOST_BUFFER);
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}
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insb(instance->io_port + hostdata->c400_host_buf,
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dst + start, 128);
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#else
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/* implies SCSI_G_NCR5380_MEM */
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memcpy_fromio(dst + start,
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@ -557,17 +562,12 @@ static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst,
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}
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if (blocks) {
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while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_HOST_BUF_NOT_RDY)
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{
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// FIXME - no timeout
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}
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while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
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; /* FIXME - no timeout */
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#ifndef SCSI_G_NCR5380_MEM
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{
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int i;
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for (i = 0; i < 128; i++)
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dst[start + i] = NCR5380_read(C400_HOST_BUFFER);
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}
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insb(instance->io_port + hostdata->c400_host_buf,
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dst + start, 128);
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#else
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/* implies SCSI_G_NCR5380_MEM */
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memcpy_fromio(dst + start,
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@ -577,7 +577,7 @@ static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst,
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blocks--;
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}
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if (!(NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_GATED_53C80_IRQ))
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if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
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printk("53C400r: no 53C80 gated irq after transfer");
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#if 0
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@ -585,7 +585,7 @@ static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst,
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* DON'T DO THIS - THEY NEVER ARRIVE!
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*/
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printk("53C400r: Waiting for 53C80 registers\n");
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while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_53C80_REG)
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while (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)
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;
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#endif
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if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
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@ -606,32 +606,26 @@ static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst,
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static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src, int len)
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{
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#ifdef SCSI_G_NCR5380_MEM
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struct NCR5380_hostdata *hostdata = shost_priv(instance);
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#endif
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int blocks = len / 128;
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int start = 0;
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int bl;
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int i;
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NCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
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NCR5380_write(C400_BLOCK_COUNTER_REG, blocks);
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NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
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NCR5380_write(hostdata->c400_blk_cnt, blocks);
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while (1) {
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if (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_GATED_53C80_IRQ) {
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if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
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printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
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return -1;
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}
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if ((bl = NCR5380_read(C400_BLOCK_COUNTER_REG)) == 0) {
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if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
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break;
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}
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while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_HOST_BUF_NOT_RDY)
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while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
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; // FIXME - timeout
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#ifndef SCSI_G_NCR5380_MEM
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{
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for (i = 0; i < 128; i++)
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NCR5380_write(C400_HOST_BUFFER, src[start + i]);
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}
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outsb(instance->io_port + hostdata->c400_host_buf,
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src + start, 128);
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#else
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/* implies SCSI_G_NCR5380_MEM */
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memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
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@ -641,14 +635,12 @@ static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src,
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blocks--;
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}
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if (blocks) {
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while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_HOST_BUF_NOT_RDY)
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while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
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; // FIXME - no timeout
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#ifndef SCSI_G_NCR5380_MEM
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{
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for (i = 0; i < 128; i++)
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NCR5380_write(C400_HOST_BUFFER, src[start + i]);
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}
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outsb(instance->io_port + hostdata->c400_host_buf,
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src + start, 128);
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#else
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/* implies SCSI_G_NCR5380_MEM */
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memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
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@ -660,7 +652,7 @@ static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src,
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#if 0
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printk("53C400w: waiting for registers to be available\n");
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THEY NEVER DO ! while (NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_53C80_REG);
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THEY NEVER DO ! while (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG);
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printk("53C400w: Got em\n");
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#endif
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@ -668,7 +660,7 @@ static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src,
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/* All documentation says to check for this. Maybe my hardware is too
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* fast. Waiting for it seems to work fine! KLL
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*/
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while (!(i = NCR5380_read(C400_CONTROL_STATUS_REG) & CSR_GATED_53C80_IRQ))
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while (!(i = NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
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; // FIXME - no timeout
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/*
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@ -29,7 +29,6 @@
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#define NCR5380_map_type int
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#define NCR5380_map_name port
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#define NCR53C400_register_offset 0
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#ifdef CONFIG_SCSI_GENERIC_NCR53C400
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#define NCR5380_region_size 16
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@ -42,7 +41,10 @@
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#define NCR5380_write(reg, value) \
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outb(value, instance->io_port + (reg))
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#define NCR5380_implementation_fields /* none */
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#define NCR5380_implementation_fields \
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int c400_ctl_status; \
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int c400_blk_cnt; \
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int c400_host_buf;
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#else
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/* therefore SCSI_G_NCR5380_MEM */
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@ -50,7 +52,6 @@
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#define NCR5380_map_type unsigned long
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#define NCR5380_map_name base
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#define NCR53C400_register_offset 0x108
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#define NCR53C400_mem_base 0x3880
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#define NCR53C400_host_buffer 0x3900
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#define NCR5380_region_size 0x3a00
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@ -63,7 +64,10 @@
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NCR53C400_mem_base + (reg))
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#define NCR5380_implementation_fields \
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void __iomem *iomem;
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void __iomem *iomem; \
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int c400_ctl_status; \
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int c400_blk_cnt; \
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int c400_host_buf;
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#endif
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