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staging/rdma/hfi1: Correctly limit VLs against SDMA engines 

Correctly reduce the number of VLs when limited by the number
of SDMA engines.

The hardware has multiple egress mechanisms, SDMA and pio, and multiples
of those. These mechanisms are chosen using the VL (8)

The fix corrects a panic issue with one of the platforms that doesn't have
enough SDMA (4) mechanisms for the typical number of VLs.

Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Jubin John <jubin.john@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Dean Luick 2015-12-01 15:38:18 -05:00 committed by Greg Kroah-Hartman
parent d22f9d6bf5
commit 11a5909b26
1 changed files with 3 additions and 3 deletions
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6
drivers/staging/rdma/hfi1/chip.c
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@ -10645,9 +10645,9 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev,
/* insure num_vls isn't larger than number of sdma engines */
if (HFI1_CAP_IS_KSET(SDMA) && num_vls > dd->chip_sdma_engines) {
dd_dev_err(dd, "num_vls %u too large, using %u VLs\n",
num_vls, HFI1_MAX_VLS_SUPPORTED);
ppd->vls_supported = num_vls = HFI1_MAX_VLS_SUPPORTED;
ppd->vls_operational = ppd->vls_supported;
num_vls, dd->chip_sdma_engines);
num_vls = dd->chip_sdma_engines;
ppd->vls_supported = dd->chip_sdma_engines;
}
/*