drm/amdgpu: add new ras workflow control flags
add ras post init function. Do some initialization after all IP have finished their late init. Add new member flags which will control the ras work flow. For now, vbios enable ras for us on boot. That might change in the future. So there should be a flag from vbios to tell us if ras is enabled or not on boot. Looks like there is no such info now. Other bits of the flags are reserved to control other parts of ras. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2707,6 +2707,9 @@ fence_driver_init:
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goto failed;
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}
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/* must succeed. */
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amdgpu_ras_post_init(adev);
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return 0;
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failed:
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@ -118,6 +118,11 @@ const char *ras_block_string[] = {
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#define ras_err_str(i) (ras_error_string[ffs(i)])
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#define ras_block_str(i) (ras_block_string[i])
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enum amdgpu_ras_flags {
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AMDGPU_RAS_FLAG_INIT_BY_VBIOS = 1,
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};
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#define RAS_DEFAULT_FLAGS (AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
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static void amdgpu_ras_self_test(struct amdgpu_device *adev)
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{
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/* TODO */
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@ -1387,13 +1392,16 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
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&con->supported);
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con->features = 0;
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INIT_LIST_HEAD(&con->head);
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/* Might need get this flag from vbios. */
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con->flags = RAS_DEFAULT_FLAGS;
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if (amdgpu_ras_recovery_init(adev))
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goto recovery_out;
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amdgpu_ras_mask &= AMDGPU_RAS_BLOCK_MASK;
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amdgpu_ras_enable_all_features(adev, 1);
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if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
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amdgpu_ras_enable_all_features(adev, 1);
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if (amdgpu_ras_fs_init(adev))
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goto fs_out;
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@ -1413,6 +1421,30 @@ recovery_out:
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return -EINVAL;
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}
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/* do some init work after IP late init as dependence */
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void amdgpu_ras_post_init(struct amdgpu_device *adev)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_manager *obj, *tmp;
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if (!con)
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return;
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/* We enable ras on all hw_supported block, but as boot parameter might
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* disable some of them and one or more IP has not implemented yet.
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* So we disable them on behalf.
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*/
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if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) {
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list_for_each_entry_safe(obj, tmp, &con->head, node) {
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if (!amdgpu_ras_is_supported(adev, obj->head.block)) {
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amdgpu_ras_feature_enable(adev, &obj->head, 0);
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/* there should be no any reference. */
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WARN_ON(alive_obj(obj));
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}
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};
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}
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}
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/* do some fini work before IP fini as dependence */
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int amdgpu_ras_pre_fini(struct amdgpu_device *adev)
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{
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@ -103,6 +103,8 @@ struct amdgpu_ras {
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/* error handler data */
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struct ras_err_handler_data *eh_data;
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struct mutex recovery_lock;
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uint32_t flags;
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};
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/* interfaces for IP */
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@ -197,6 +199,7 @@ static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev,
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/* called in ip_init and ip_fini */
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int amdgpu_ras_init(struct amdgpu_device *adev);
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void amdgpu_ras_post_init(struct amdgpu_device *adev);
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int amdgpu_ras_fini(struct amdgpu_device *adev);
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int amdgpu_ras_pre_fini(struct amdgpu_device *adev);
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