staging: slicoss: avoid CamelCases in slichw.h
Replace CamelCases to comply with the standard kernel coding style. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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a81691d1cc
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1081bb83a1
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@ -245,18 +245,18 @@ struct slic_hddr_wds {
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} hdrs_14port;
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struct {
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u32 frame_status;
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u16 ByteCnt;
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u16 TpChksum;
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u16 CtxHash;
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u16 MacHash;
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u32 BufLnk;
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u16 byte_cnt;
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u16 tp_chksum;
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u16 ctx_hash;
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u16 mac_hash;
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u32 buf_lnk;
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} hdrs_gbit;
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} u0;
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};
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#define frame_status14 u0.hdrs_14port.frame_status
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#define frame_status_b14 u0.hdrs_14port.frame_status_b
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#define frame_statusGB u0.hdrs_gbit.frame_status
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#define frame_status_gb u0.hdrs_gbit.frame_status
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struct slic_host64sg {
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u32 paddrl;
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@ -460,7 +460,7 @@ struct slic_pnp_capabilities {
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};
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struct slic_config_mac {
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u8 macaddrA[6];
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u8 macaddr_a[6];
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};
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#define ATK_FRU_FORMAT 0x00
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@ -520,56 +520,56 @@ union oemfru {
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* SLIC EEPROM structure for Mojave
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*/
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struct slic_eeprom {
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u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
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u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
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u16 FlashSize; /* 02 Flash size */
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u16 EepromSize; /* 03 EEPROM Size */
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u16 VendorId; /* 04 Vendor ID */
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u16 DeviceId; /* 05 Device ID */
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u8 RevisionId; /* 06 Revision ID */
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u8 ClassCode[3]; /* 07 Class Code */
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u8 DbgIntPin; /* 08 Debug Interrupt pin */
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u8 NetIntPin0; /* Network Interrupt Pin */
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u8 MinGrant; /* 09 Minimum grant */
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u8 MaxLat; /* Maximum Latency */
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u16 PciStatus; /* 10 PCI Status */
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u16 SubSysVId; /* 11 Subsystem Vendor Id */
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u16 SubSysId; /* 12 Subsystem ID */
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u16 DbgDevId; /* 13 Debug Device Id */
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u16 DramRomFn; /* 14 Dram/Rom function */
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u16 DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
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u16 RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
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u8 NetIntPin1; /* 17 Network Interface Pin 1
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u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
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u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/
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u16 flash_size; /* 02 Flash size */
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u16 eeprom_size; /* 03 EEPROM Size */
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u16 vendor_id; /* 04 Vendor ID */
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u16 device_id; /* 05 Device ID */
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u8 revision_id; /* 06 Revision ID */
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u8 class_code[3]; /* 07 Class Code */
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u8 dbg_int_pin; /* 08 Debug Interrupt pin */
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u8 net_int_pin0; /* Network Interrupt Pin */
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u8 min_grant; /* 09 Minimum grant */
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u8 max_lat; /* Maximum Latency */
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u16 pci_status; /* 10 PCI Status */
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u16 sub_sys_vid; /* 11 Subsystem Vendor Id */
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u16 sub_sys_id; /* 12 Subsystem ID */
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u16 dbg_dev_id; /* 13 Debug Device Id */
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u16 dram_rom_fn; /* 14 Dram/Rom function */
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u16 dsize2pci; /* 15 DRAM size to PCI (bytes * 64K) */
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u16 rsize2pci; /* 16 ROM extension size to PCI (bytes * 4k) */
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u8 net_int_pin1; /* 17 Network Interface Pin 1
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* (simba/leone only)
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*/
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u8 NetIntPin2; /* Network Interface Pin 2 (simba/leone only)*/
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u8 net_int_pin2; /* Network Interface Pin 2 (simba/leone only)*/
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union {
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u8 NetIntPin3; /* 18 Network Interface Pin 3 (simba only) */
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u8 FreeTime; /* FreeTime setting (leone/mojave only) */
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u8 net_int_pin3;/* 18 Network Interface Pin 3 (simba only) */
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u8 free_time; /* FreeTime setting (leone/mojave only) */
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} u1;
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u8 TBIctl; /* 10-bit interface control (Mojave only) */
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u16 DramSize; /* 19 DRAM size (bytes * 64k) */
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u8 tbi_ctl; /* 10-bit interface control (Mojave only) */
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u16 dram_size; /* 19 DRAM size (bytes * 64k) */
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union {
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struct {
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/* Mac Interface Specific portions */
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struct slic_config_mac MacInfo[SLIC_NBR_MACS];
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struct slic_config_mac mac_info[SLIC_NBR_MACS];
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} mac; /* MAC access for all boards */
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struct {
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/* use above struct for MAC access */
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struct slic_config_mac pad[SLIC_NBR_MACS - 1];
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u16 DeviceId2; /* Device ID for 2nd PCI function */
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u8 IntPin2; /* Interrupt pin for 2nd PCI function */
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u8 ClassCode2[3]; /* Class Code for 2nd PCI function */
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u16 device_id2; /* Device ID for 2nd PCI function */
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u8 int_pin2; /* Interrupt pin for 2nd PCI function */
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u8 class_code2[3]; /* Class Code for 2nd PCI function */
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} mojave; /* 2nd function access for gigabit board */
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} u2;
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u16 CfgByte6; /* Config Byte 6 */
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u16 PMECapab; /* Power Mgment capabilities */
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u16 NwClkCtrls; /* NetworkClockControls */
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u8 FruFormat; /* Alacritech FRU format type */
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struct atk_fru AtkFru; /* Alacritech FRU information */
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u8 OemFruFormat; /* optional OEM FRU format type */
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union oemfru OemFru; /* optional OEM FRU information */
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u8 Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
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u16 cfg_byte6; /* Config Byte 6 */
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u16 pme_capab; /* Power Mgment capabilities */
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u16 nw_clk_ctrls; /* NetworkClockControls */
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u8 fru_format; /* Alacritech FRU format type */
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struct atk_fru atk_fru; /* Alacritech FRU information */
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u8 oem_fru_format; /* optional OEM FRU format type */
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union oemfru oem_fru; /* optional OEM FRU information */
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u8 pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
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* (if OEM FRU info exists) and two unusable
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* bytes at the end
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*/
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@ -577,46 +577,46 @@ struct slic_eeprom {
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/* SLIC EEPROM structure for Oasis */
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struct oslic_eeprom {
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u16 Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
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u16 EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
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u16 FlashConfig0; /* 02 Flash Config for SPI device 0 */
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u16 FlashConfig1; /* 03 Flash Config for SPI device 1 */
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u16 VendorId; /* 04 Vendor ID */
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u16 DeviceId; /* 05 Device ID (function 0) */
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u8 RevisionId; /* 06 Revision ID */
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u8 ClassCode[3]; /* 07 Class Code for PCI function 0 */
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u8 IntPin1; /* 08 Interrupt pin for PCI function 1*/
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u8 ClassCode2[3]; /* 09 Class Code for PCI function 1 */
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u8 IntPin2; /* 10 Interrupt pin for PCI function 2*/
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u8 IntPin0; /* Interrupt pin for PCI function 0*/
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u8 MinGrant; /* 11 Minimum grant */
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u8 MaxLat; /* Maximum Latency */
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u16 SubSysVId; /* 12 Subsystem Vendor Id */
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u16 SubSysId; /* 13 Subsystem ID */
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u16 FlashSize; /* 14 Flash size (bytes / 4K) */
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u16 DSize2Pci; /* 15 DRAM size to PCI (bytes / 64K) */
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u16 RSize2Pci; /* 16 Flash (ROM extension) size to PCI
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u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
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u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/
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u16 flash_config0; /* 02 Flash Config for SPI device 0 */
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u16 flash_config1; /* 03 Flash Config for SPI device 1 */
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u16 vendor_id; /* 04 Vendor ID */
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u16 device_id; /* 05 Device ID (function 0) */
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u8 revision_id; /* 06 Revision ID */
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u8 class_code[3]; /* 07 Class Code for PCI function 0 */
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u8 int_pin1; /* 08 Interrupt pin for PCI function 1*/
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u8 class_code2[3]; /* 09 Class Code for PCI function 1 */
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u8 int_pin2; /* 10 Interrupt pin for PCI function 2*/
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u8 int_pin0; /* Interrupt pin for PCI function 0*/
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u8 min_grant; /* 11 Minimum grant */
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u8 max_lat; /* Maximum Latency */
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u16 sub_sys_vid; /* 12 Subsystem Vendor Id */
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u16 sub_sys_id; /* 13 Subsystem ID */
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u16 flash_size; /* 14 Flash size (bytes / 4K) */
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u16 dsize2pci; /* 15 DRAM size to PCI (bytes / 64K) */
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u16 rsize2pci; /* 16 Flash (ROM extension) size to PCI
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* (bytes / 4K)
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*/
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u16 DeviceId1; /* 17 Device Id (function 1) */
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u16 DeviceId2; /* 18 Device Id (function 2) */
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u16 CfgByte6; /* 19 Device Status Config Bytes 6-7 */
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u16 PMECapab; /* 20 Power Mgment capabilities */
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u8 MSICapab; /* 21 MSI capabilities */
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u8 ClockDivider; /* Clock divider */
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u16 PciStatusLow; /* 22 PCI Status bits 15:0 */
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u16 PciStatusHigh; /* 23 PCI Status bits 31:16 */
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u16 DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
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u16 DramConfigHigh; /* 25 DRAM Configuration bits 31:16 */
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u16 DramSize; /* 26 DRAM size (bytes / 64K) */
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u16 GpioTbiCtl; /* 27 GPIO/TBI controls for functions 1/0 */
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u16 EepromSize; /* 28 EEPROM Size */
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struct slic_config_mac MacInfo[2]; /* 29 MAC addresses (2 ports) */
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u8 FruFormat; /* 35 Alacritech FRU format type */
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struct atk_fru AtkFru; /* Alacritech FRU information */
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u8 OemFruFormat; /* optional OEM FRU format type */
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union oemfru OemFru; /* optional OEM FRU information */
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u8 Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
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u16 device_id1; /* 17 Device Id (function 1) */
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u16 device_id2; /* 18 Device Id (function 2) */
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u16 cfg_byte6; /* 19 Device Status Config Bytes 6-7 */
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u16 pme_capab; /* 20 Power Mgment capabilities */
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u8 msi_capab; /* 21 MSI capabilities */
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u8 clock_divider; /* Clock divider */
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u16 pci_status_low; /* 22 PCI Status bits 15:0 */
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u16 pci_status_high; /* 23 PCI Status bits 31:16 */
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u16 dram_config_low; /* 24 DRAM Configuration bits 15:0 */
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u16 dram_config_high; /* 25 DRAM Configuration bits 31:16 */
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u16 dram_size; /* 26 DRAM size (bytes / 64K) */
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u16 gpio_tbi_ctl; /* 27 GPIO/TBI controls for functions 1/0 */
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u16 eeprom_size; /* 28 EEPROM Size */
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struct slic_config_mac mac_info[2]; /* 29 MAC addresses (2 ports) */
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u8 fru_format; /* 35 Alacritech FRU format type */
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struct atk_fru atk_fru; /* Alacritech FRU information */
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u8 oem_fru_format; /* optional OEM FRU format type */
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union oemfru oem_fru; /* optional OEM FRU information */
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u8 pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
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* (if OEM FRU info exists) and two unusable
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* bytes at the end
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*/
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@ -633,18 +633,18 @@ struct oslic_eeprom {
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* SlicGetConfigData()
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*/
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struct slic_config {
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bool EepromValid; /* Valid EEPROM flag (checksum good?) */
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u16 DramSize; /* DRAM size (bytes / 64K) */
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struct slic_config_mac MacInfo[SLIC_NBR_MACS]; /* MAC addresses */
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u8 FruFormat; /* Alacritech FRU format type */
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struct atk_fru AtkFru; /* Alacritech FRU information */
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u8 OemFruFormat; /* optional OEM FRU format type */
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bool eeprom_valid; /* Valid EEPROM flag (checksum good?) */
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u16 dram_size; /* DRAM size (bytes / 64K) */
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struct slic_config_mac mac_info[SLIC_NBR_MACS]; /* MAC addresses */
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u8 fru_format; /* Alacritech FRU format type */
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struct atk_fru atk_fru; /* Alacritech FRU information */
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u8 oem_fru_format; /* optional OEM FRU format type */
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union {
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struct vendor1_fru vendor1_fru;
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struct vendor2_fru vendor2_fru;
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struct vendor3_fru vendor3_fru;
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struct vendor4_fru vendor4_fru;
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} OemFru;
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} oem_fru;
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};
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#pragma pack()
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@ -540,7 +540,7 @@ static void slic_adapter_set_hwaddr(struct adapter *adapter)
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if ((adapter->card) && (card->config_set)) {
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memcpy(adapter->macaddr,
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card->config.MacInfo[adapter->functionnumber].macaddrA,
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card->config.mac_info[adapter->functionnumber].macaddr_a,
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sizeof(struct slic_config_mac));
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if (is_zero_ether_addr(adapter->currmacaddr))
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memcpy(adapter->currmacaddr, adapter->macaddr,
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@ -1876,8 +1876,8 @@ static void slic_rcv_handle_error(struct adapter *adapter,
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if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
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adapter->if_events.ip_hlen++;
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} else {
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if (hdr->frame_statusGB & VGBSTAT_XPERR) {
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u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
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if (hdr->frame_status_gb & VGBSTAT_XPERR) {
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u32 xerr = hdr->frame_status_gb >> VGBSTAT_XERRSHFT;
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if (xerr == VGBSTAT_XCSERR)
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adapter->if_events.tp_csum++;
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@ -1886,10 +1886,10 @@ static void slic_rcv_handle_error(struct adapter *adapter,
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if (xerr == VGBSTAT_XHLEN)
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adapter->if_events.tp_hlen++;
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}
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if (hdr->frame_statusGB & VGBSTAT_NETERR) {
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if (hdr->frame_status_gb & VGBSTAT_NETERR) {
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u32 nerr =
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(hdr->
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frame_statusGB >> VGBSTAT_NERRSHFT) &
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frame_status_gb >> VGBSTAT_NERRSHFT) &
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VGBSTAT_NERRMSK;
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if (nerr == VGBSTAT_NCSERR)
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adapter->if_events.ip_csum++;
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@ -1898,8 +1898,8 @@ static void slic_rcv_handle_error(struct adapter *adapter,
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if (nerr == VGBSTAT_NHLEN)
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adapter->if_events.ip_hlen++;
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}
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if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
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u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
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if (hdr->frame_status_gb & VGBSTAT_LNKERR) {
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u32 lerr = hdr->frame_status_gb & VGBSTAT_LERRMSK;
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if (lerr == VGBSTAT_LDEARLY)
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adapter->if_events.rcvearly++;
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@ -2682,13 +2682,13 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
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case SLIC_2GB_DEVICE_ID:
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/* extract EEPROM data and pointers to EEPROM data */
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pOeeprom = (struct oslic_eeprom *)peeprom;
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eecodesize = pOeeprom->EecodeSize;
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dramsize = pOeeprom->DramSize;
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pmac = pOeeprom->MacInfo;
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fruformat = pOeeprom->FruFormat;
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patkfru = &pOeeprom->AtkFru;
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oemfruformat = pOeeprom->OemFruFormat;
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poemfru = &pOeeprom->OemFru;
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eecodesize = pOeeprom->eecode_size;
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dramsize = pOeeprom->dram_size;
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pmac = pOeeprom->mac_info;
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fruformat = pOeeprom->fru_format;
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patkfru = &pOeeprom->atk_fru;
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oemfruformat = pOeeprom->oem_fru_format;
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poemfru = &pOeeprom->oem_fru;
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macaddrs = 2;
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/*
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* Minor kludge for Oasis card
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@ -2699,17 +2699,17 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
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break;
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default:
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/* extract EEPROM data and pointers to EEPROM data */
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eecodesize = peeprom->EecodeSize;
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dramsize = peeprom->DramSize;
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pmac = peeprom->u2.mac.MacInfo;
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fruformat = peeprom->FruFormat;
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patkfru = &peeprom->AtkFru;
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oemfruformat = peeprom->OemFruFormat;
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poemfru = &peeprom->OemFru;
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eecodesize = peeprom->eecode_size;
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dramsize = peeprom->dram_size;
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pmac = peeprom->u2.mac.mac_info;
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fruformat = peeprom->fru_format;
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patkfru = &peeprom->atk_fru;
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oemfruformat = peeprom->oem_fru_format;
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poemfru = &peeprom->oem_fru;
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break;
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}
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card->config.EepromValid = false;
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card->config.eeprom_valid = false;
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/* see if the EEPROM is valid by checking it's checksum */
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if ((eecodesize <= MAX_EECODE_SIZE) &&
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@ -2726,26 +2726,26 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
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* we wouldn't need this
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*/
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if (ee_chksum == calc_chksum)
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card->config.EepromValid = true;
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card->config.eeprom_valid = true;
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}
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/* copy in the DRAM size */
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card->config.DramSize = dramsize;
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card->config.dram_size = dramsize;
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/* copy in the MAC address(es) */
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for (i = 0; i < macaddrs; i++) {
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memcpy(&card->config.MacInfo[i],
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memcpy(&card->config.mac_info[i],
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&pmac[i], sizeof(struct slic_config_mac));
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}
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/* copy the Alacritech FRU information */
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card->config.FruFormat = fruformat;
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memcpy(&card->config.AtkFru, patkfru, sizeof(struct atk_fru));
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card->config.fru_format = fruformat;
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memcpy(&card->config.atk_fru, patkfru, sizeof(struct atk_fru));
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pci_free_consistent(adapter->pcidev,
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sizeof(struct slic_eeprom),
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peeprom, phys_config);
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if (!card->config.EepromValid) {
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if (!card->config.eeprom_valid) {
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slic_write64(adapter, SLIC_REG_ISP, 0, 0);
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slic_flush_write(adapter);
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dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
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