arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03. No functional change. Reviewed-by: Shaoqin Huang <shahuang@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v2-2-4c6add1f6257@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -135,7 +135,6 @@
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#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
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#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
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#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
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#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
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#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
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#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
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@ -55,6 +55,34 @@ Field 29 TX
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Res0 28:0
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EndSysreg
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Sysreg MDSCR_EL1 2 0 0 2 2
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Res0 63:36
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Field 35 EHBWE
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Field 34 EnSPM
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Field 33 TTA
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Field 32 EMBWE
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Field 31 TFO
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Field 30 RXfull
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Field 29 TXfull
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Res0 28
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Field 27 RXO
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Field 26 TXU
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Res0 25:24
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Field 23:22 INTdis
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Field 21 TDA
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Res0 20
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Field 19 SC2
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Res0 18:16
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Field 15 MDE
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Field 14 HDE
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Field 13 KDE
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Field 12 TDCC
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Res0 11:7
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Field 6 ERR
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Res0 5:1
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Field 0 SS
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EndSysreg
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Sysreg ID_PFR0_EL1 3 0 0 1 0
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Res0 63:32
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UnsignedEnum 31:28 RAS
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