RDMA/hns: Fix 0-length sge calculation error
One RC SQ WQE can store 2 sges but UD can't, so ignore 2 valid sges of
wr.sglist for RC which have been filled in WQE before setting extended
sge. Either of RC and UD can not contain 0-length sges, so these 0-length
sges should be skipped.
Fixes: 54d6638765
("RDMA/hns: Optimize WQE buffer size calculating process")
Link: https://lore.kernel.org/r/1606558959-48510-2-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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parent
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@ -214,25 +214,20 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp,
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return 0;
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}
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static void set_extend_sge(struct hns_roce_qp *qp, const struct ib_send_wr *wr,
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unsigned int *sge_ind, unsigned int valid_num_sge)
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static void set_extend_sge(struct hns_roce_qp *qp, struct ib_sge *sge,
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unsigned int *sge_ind, unsigned int cnt)
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{
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struct hns_roce_v2_wqe_data_seg *dseg;
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unsigned int cnt = valid_num_sge;
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struct ib_sge *sge = wr->sg_list;
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unsigned int idx = *sge_ind;
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if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
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cnt -= HNS_ROCE_SGE_IN_WQE;
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sge += HNS_ROCE_SGE_IN_WQE;
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}
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while (cnt > 0) {
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dseg = hns_roce_get_extend_sge(qp, idx & (qp->sge.sge_cnt - 1));
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set_data_seg_v2(dseg, sge);
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idx++;
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if (likely(sge->length)) {
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set_data_seg_v2(dseg, sge);
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idx++;
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cnt--;
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}
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sge++;
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cnt--;
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}
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*sge_ind = idx;
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@ -340,7 +335,8 @@ static int set_rwqe_data_seg(struct ib_qp *ibqp, const struct ib_send_wr *wr,
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}
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}
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set_extend_sge(qp, wr, sge_ind, valid_num_sge);
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set_extend_sge(qp, wr->sg_list + i, sge_ind,
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valid_num_sge - HNS_ROCE_SGE_IN_WQE);
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}
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roce_set_field(rc_sq_wqe->byte_16,
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@ -503,7 +499,7 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
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if (ret)
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return ret;
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set_extend_sge(qp, wr, &curr_idx, valid_num_sge);
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set_extend_sge(qp, wr->sg_list, &curr_idx, valid_num_sge);
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/*
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* The pipeline can sequentially post all valid WQEs into WQ buffer,
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