iio: ad_sigma_delta: Don't put SPI transfer buffer on the stack
Use a heap allocated memory for the SPI transfer buffer. Using stack memory
can corrupt stack memory when using DMA on some systems.
This change moves the buffer from the stack of the trigger handler call to
the heap of the buffer of the state struct. The size increases takes into
account the alignment for the timestamp, which is 8 bytes.
The 'data' buffer is split into 'tx_buf' and 'rx_buf', to make a clearer
separation of which part of the buffer should be used for TX & RX.
Fixes: af3008485e
("iio:adc: Add common code for ADI Sigma Delta devices")
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20201124123807.19717-1-alexandru.ardelean@analog.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
parent
6d74a3ee1e
commit
0fb6ee8d0b
|
@ -57,7 +57,7 @@ EXPORT_SYMBOL_GPL(ad_sd_set_comm);
|
|||
int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
|
||||
unsigned int size, unsigned int val)
|
||||
{
|
||||
uint8_t *data = sigma_delta->data;
|
||||
uint8_t *data = sigma_delta->tx_buf;
|
||||
struct spi_transfer t = {
|
||||
.tx_buf = data,
|
||||
.len = size + 1,
|
||||
|
@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(ad_sd_write_reg);
|
|||
static int ad_sd_read_reg_raw(struct ad_sigma_delta *sigma_delta,
|
||||
unsigned int reg, unsigned int size, uint8_t *val)
|
||||
{
|
||||
uint8_t *data = sigma_delta->data;
|
||||
uint8_t *data = sigma_delta->tx_buf;
|
||||
int ret;
|
||||
struct spi_transfer t[] = {
|
||||
{
|
||||
|
@ -146,22 +146,22 @@ int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta,
|
|||
{
|
||||
int ret;
|
||||
|
||||
ret = ad_sd_read_reg_raw(sigma_delta, reg, size, sigma_delta->data);
|
||||
ret = ad_sd_read_reg_raw(sigma_delta, reg, size, sigma_delta->rx_buf);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
switch (size) {
|
||||
case 4:
|
||||
*val = get_unaligned_be32(sigma_delta->data);
|
||||
*val = get_unaligned_be32(sigma_delta->rx_buf);
|
||||
break;
|
||||
case 3:
|
||||
*val = get_unaligned_be24(&sigma_delta->data[0]);
|
||||
*val = get_unaligned_be24(sigma_delta->rx_buf);
|
||||
break;
|
||||
case 2:
|
||||
*val = get_unaligned_be16(sigma_delta->data);
|
||||
*val = get_unaligned_be16(sigma_delta->rx_buf);
|
||||
break;
|
||||
case 1:
|
||||
*val = sigma_delta->data[0];
|
||||
*val = sigma_delta->rx_buf[0];
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
@ -395,11 +395,9 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p)
|
|||
struct iio_poll_func *pf = p;
|
||||
struct iio_dev *indio_dev = pf->indio_dev;
|
||||
struct ad_sigma_delta *sigma_delta = iio_device_get_drvdata(indio_dev);
|
||||
uint8_t *data = sigma_delta->rx_buf;
|
||||
unsigned int reg_size;
|
||||
unsigned int data_reg;
|
||||
uint8_t data[16];
|
||||
|
||||
memset(data, 0x00, 16);
|
||||
|
||||
reg_size = indio_dev->channels[0].scan_type.realbits +
|
||||
indio_dev->channels[0].scan_type.shift;
|
||||
|
|
|
@ -79,8 +79,12 @@ struct ad_sigma_delta {
|
|||
/*
|
||||
* DMA (thus cache coherency maintenance) requires the
|
||||
* transfer buffers to live in their own cache lines.
|
||||
* 'tx_buf' is up to 32 bits.
|
||||
* 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
|
||||
* rounded to 16 bytes to take into account padding.
|
||||
*/
|
||||
uint8_t data[4] ____cacheline_aligned;
|
||||
uint8_t tx_buf[4] ____cacheline_aligned;
|
||||
uint8_t rx_buf[16] __aligned(8);
|
||||
};
|
||||
|
||||
static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
|
||||
|
|
Loading…
Reference in New Issue