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drm/i915: Fix gpu frequency change tracing 

With gen < 9 we have had always 50Mhz units as our hw
ratio. With gen >= 9 the hw ratio changed to 16.667Mhz (50/3).
The result was that our gpu frequency tracing started to output
values 3 times larger than expected due to hardcoded scaling
value. Fix this by using  Use intel_gpu_freq() when generating Mhz
value from ratio for 'intel_gpu_freq_change' trace event.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92591
Cc: stable@vger.kernel.org # v4.3+
Reported-by: Eero Tamminen <eero.t.tamminen@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447776866-29384-1-git-send-email-mika.kuoppala@intel.com
This commit is contained in:
Mika Kuoppala 2015-11-17 18:14:26 +02:00 committed by Jani Nikula
parent 76dc3769d7
commit 0f94592efd
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/intel_pm.c
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@ -4449,7 +4449,7 @@ static void gen6_set_rps(struct drm_device *dev, u8 val)
POSTING_READ(GEN6_RPNSWREQ); POSTING_READ(GEN6_RPNSWREQ);
dev_priv->rps.cur_freq = val; dev_priv->rps.cur_freq = val;
trace_intel_gpu_freq_change(val * 50); trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));
} }
static void valleyview_set_rps(struct drm_device *dev, u8 val) static void valleyview_set_rps(struct drm_device *dev, u8 val)