ARM: dts: imx7s: Add node for GPC
Add node for GPC and specify as a parent interrupt controller for SoC bus. Cc: yurovsky@gmail.com Cc: Dong Aisheng <aisheng.dong@nxp.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -42,6 +42,7 @@
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*/
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#include <dt-bindings/clock/imx7d-clock.h>
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#include <dt-bindings/power/imx7-power.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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@ -119,7 +120,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&intc>;
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interrupt-parent = <&gpc>;
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ranges;
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funnel@30041000 {
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@ -301,6 +302,7 @@
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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reg = <0x31001000 0x1000>,
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<0x31002000 0x2000>,
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<0x31004000 0x2000>,
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@ -309,6 +311,7 @@
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timer {
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compatible = "arm,armv7-timer";
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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@ -564,6 +567,27 @@
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#reset-cells = <1>;
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};
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gpc: gpc@303a0000 {
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compatible = "fsl,imx7d-gpc";
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reg = <0x303a0000 0x10000>;
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interrupt-controller;
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <3>;
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interrupt-parent = <&intc>;
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#power-domain-cells = <1>;
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pgc {
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#address-cells = <1>;
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#size-cells = <0>;
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pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY {
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#power-domain-cells = <0>;
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reg = <IMX7_POWER_DOMAIN_PCIE_PHY>;
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power-supply = <®_1p0d>;
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};
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};
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};
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};
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aips2: aips-bus@30400000 {
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