parisc: Check if secondary CPUs want own PDC calls
The architecture specification says (for 64-bit systems): PDC is a per processor resource, and operating system software must be prepared to manage separate pointers to PDCE_PROC for each processor. The address of PDCE_PROC for the monarch processor is stored in the Page Zero location MEM_PDC. The address of PDCE_PROC for each non-monarch processor is passed in gr26 when PDCE_RESET invokes OS_RENDEZ. Currently we still use one PDC for all CPUs, but in case we face a machine which is following the specification let's warn about it. Signed-off-by: Helge Deller <deller@gmx.de>
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@ -138,6 +138,16 @@ $pgt_fill_loop:
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std %dp,0x18(%r10)
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#endif
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#ifdef CONFIG_64BIT
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/* Get PDCE_PROC for monarch CPU. */
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#define MEM_PDC_LO 0x388
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#define MEM_PDC_HI 0x35C
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ldw MEM_PDC_LO(%r0),%r3
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ldw MEM_PDC_HI(%r0),%r10
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depd %r10, 31, 32, %r3 /* move to upper word */
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#endif
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#ifdef CONFIG_SMP
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/* Set the smp rendezvous address into page zero.
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** It would be safer to do this in init_smp_config() but
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@ -196,12 +206,6 @@ common_stext:
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** Someday, palo might not do this for the Monarch either.
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*/
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2:
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#define MEM_PDC_LO 0x388
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#define MEM_PDC_HI 0x35C
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ldw MEM_PDC_LO(%r0),%r3
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ldw MEM_PDC_HI(%r0),%r6
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depd %r6, 31, 32, %r3 /* move to upper word */
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mfctl %cr30,%r6 /* PCX-W2 firmware bug */
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ldo PDC_PSW(%r0),%arg0 /* 21 */
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@ -268,6 +272,8 @@ $install_iva:
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aligned_rfi:
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pcxt_ssm_bug
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copy %r3, %arg0 /* PDCE_PROC for smp_callin() */
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rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
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/* Don't need NOPs, have 8 compliant insn before rfi */
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@ -292,10 +292,15 @@ smp_cpu_init(int cpunum)
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* Slaves start using C here. Indirectly called from smp_slave_stext.
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* Do what start_kernel() and main() do for boot strap processor (aka monarch)
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*/
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void __init smp_callin(void)
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void __init smp_callin(unsigned long pdce_proc)
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{
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int slave_id = cpu_now_booting;
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#ifdef CONFIG_64BIT
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WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32
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| PAGE0->mem_pdc) != pdce_proc);
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#endif
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smp_cpu_init(slave_id);
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preempt_disable();
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