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ARM: Keystone DTS update for 4.16 

- Enable GPIO bank2 for K2L
  - Enable QSPI for K2G & K2G-EVM
  - Enable UART1/2 for K2G & K2G-EVM
  - Enable peripherals for K2G-ICE
  - Fix C1 and C2 DTS warnings
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Merge tag 'keystone_dts_for_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

ARM: Keystone DTS update for 4.16

 - Enable GPIO bank2 for K2L
 - Enable QSPI for K2G & K2G-EVM
 - Enable UART1/2 for K2G & K2G-EVM
 - Enable peripherals for K2G-ICE
 - Fix C1 and C2 DTS warnings

* tag 'keystone_dts_for_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone-k2l-clocks: Add missing unit name to clock nodes that have regs
  ARM: dts: keystone-k2e-clocks: Add missing unit name to clock nodes that have regs
  ARM: dts: keystone-hk-clocks: Add missing unit name to clock nodes that have regs
  ARM: dts: keystone-clocks: Add missing unit name to clock nodes that have regs
  ARM: dts: keystone: Add missing unit name to interrupt controller
  ARM: dts: keystone: Get rid of usage of skeleton.dtsi
  ARM: dts: keystone*: Use a single soc0 instance
  ARM: dts: keystone*: Standardize license with SPDX tag
  ARM: dts: k2g-evm: Enable UART 2
  ARM: dts: k2g: Add UART 1 and 2 instances
  ARM: dts: keystone: Add generic compatible string for I2C EEPROM
  ARM: dts: keystone-k2g-ice: Add DT nodes for few peripherals
  ARM: dts: keystone-k2g-evm: Add QSPI DT node.
  ARM: dts: keystone-k2g: Move ti,non-removable property to board dts
  ARM: dts: keystone-k2g-evm: Fix botched up merge
  ARM: dts: keystone-k2g: Add QSPI DT entry
  ARM: dts: keystone-k2l: Add the second gpio bank node

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-01-04 23:12:16 -08:00
parent 38b45e5186 4fe85b0cdd
commit 0e9288e003
17 changed files with 676 additions and 243 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

59
arch/arm/boot/dts/keystone-clocks.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 clock tree
*
* Copyright (C) 2013 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
@ -51,7 +48,7 @@ clocks {
clock-output-names = "gemtraceclk";
};
chipstmxptclk: chipstmxptclk {
chipstmxptclk: chipstmxptclk@2310164 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-divider-clock";
clocks = <&mainmuxclk>;
@ -160,7 +157,7 @@ clocks {
clock-output-names = "chipclk1rstiso112";
};
clkmodrst0: clkmodrst0 {
clkmodrst0: clkmodrst0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@ -171,7 +168,7 @@ clocks {
};
clkusb: clkusb {
clkusb: clkusb@2350008 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@ -181,7 +178,7 @@ clocks {
domain-id = <0>;
};
clkaemifspi: clkaemifspi {
clkaemifspi: clkaemifspi@235000c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@ -192,7 +189,7 @@ clocks {
};
clkdebugsstrc: clkdebugsstrc {
clkdebugsstrc: clkdebugsstrc@2350014 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -202,7 +199,7 @@ clocks {
domain-id = <1>;
};
clktetbtrc: clktetbtrc {
clktetbtrc: clktetbtrc@2350018 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -212,7 +209,7 @@ clocks {
domain-id = <1>;
};
clkpa: clkpa {
clkpa: clkpa@235001c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&paclk13>;
@ -222,7 +219,7 @@ clocks {
domain-id = <2>;
};
clkcpgmac: clkcpgmac {
clkcpgmac: clkcpgmac@2350020 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>;
@ -232,7 +229,7 @@ clocks {
domain-id = <2>;
};
clksa: clksa {
clksa: clksa@2350024 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>;
@ -242,7 +239,7 @@ clocks {
domain-id = <2>;
};
clkpcie: clkpcie {
clkpcie: clkpcie@2350028 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -252,7 +249,7 @@ clocks {
domain-id = <3>;
};
clksr: clksr {
clksr: clksr@2350034 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso112>;
@ -262,7 +259,7 @@ clocks {
domain-id = <6>;
};
clkgem0: clkgem0 {
clkgem0: clkgem0@235003c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -272,7 +269,7 @@ clocks {
domain-id = <8>;
};
clkddr30: clkddr30 {
clkddr30: clkddr30@235005c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -282,7 +279,7 @@ clocks {
domain-id = <16>;
};
clkwdtimer0: clkwdtimer0 {
clkwdtimer0: clkwdtimer0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -292,7 +289,7 @@ clocks {
domain-id = <0>;
};
clkwdtimer1: clkwdtimer1 {
clkwdtimer1: clkwdtimer1@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -302,7 +299,7 @@ clocks {
domain-id = <0>;
};
clkwdtimer2: clkwdtimer2 {
clkwdtimer2: clkwdtimer2@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -312,7 +309,7 @@ clocks {
domain-id = <0>;
};
clkwdtimer3: clkwdtimer3 {
clkwdtimer3: clkwdtimer3@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -322,7 +319,7 @@ clocks {
domain-id = <0>;
};
clktimer15: clktimer15 {
clktimer15: clktimer15@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -332,7 +329,7 @@ clocks {
domain-id = <0>;
};
clkuart0: clkuart0 {
clkuart0: clkuart0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -342,7 +339,7 @@ clocks {
domain-id = <0>;
};
clkuart1: clkuart1 {
clkuart1: clkuart1@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -352,7 +349,7 @@ clocks {
domain-id = <0>;
};
clkaemif: clkaemif {
clkaemif: clkaemif@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>;
@ -362,7 +359,7 @@ clocks {
domain-id = <0>;
};
clkusim: clkusim {
clkusim: clkusim@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -372,7 +369,7 @@ clocks {
domain-id = <0>;
};
clki2c: clki2c {
clki2c: clki2c@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -382,7 +379,7 @@ clocks {
domain-id = <0>;
};
clkspi: clkspi {
clkspi: clkspi@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>;
@ -392,7 +389,7 @@ clocks {
domain-id = <0>;
};
clkgpio: clkgpio {
clkgpio: clkgpio@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -402,7 +399,7 @@ clocks {
domain-id = <0>;
};
clkkeymgr: clkkeymgr {
clkkeymgr: clkkeymgr@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;

15
arch/arm/boot/dts/keystone-k2e-clocks.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Edison SoC specific device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
@ -35,7 +32,7 @@ clocks {
reg-names = "control";
};
clkusb1: clkusb1 {
clkusb1: clkusb1@2350004 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@ -45,7 +42,7 @@ clocks {
domain-id = <0>;
};
clkhyperlink0: clkhyperlink0 {
clkhyperlink0: clkhyperlink02350030 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -55,7 +52,7 @@ clocks {
domain-id = <5>;
};
clkpcie1: clkpcie1 {
clkpcie1: clkpcie1@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -65,7 +62,7 @@ clocks {
domain-id = <18>;
};
clkxge: clkxge {
clkxge: clkxge@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;

13
arch/arm/boot/dts/keystone-k2e-evm.dts
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Edison EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
@ -28,8 +25,9 @@
status = "okay";
};
};
};
soc {
&soc0 {
clocks {
refclksys: refclksys {
@ -53,7 +51,6 @@
clock-output-names = "refclk-ddr3a";
};
};
};
};
&usb_phy {
@ -82,7 +79,7 @@
&i2c0 {
dtt@50 {
compatible = "at,24c1024";
compatible = "atmel,24c1024";
reg = <0x50>;
};
};

7
arch/arm/boot/dts/keystone-k2e-netcp.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Edison Netcp driver
*
* Copyright 2015 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {

11
arch/arm/boot/dts/keystone-k2e.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Edison soc device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
@ -48,8 +45,9 @@
aliases {
rproc0 = &dsp0;
};
};
soc {
&soc0 {
/include/ "keystone-k2e-clocks.dtsi"
usb: usb@2680000 {
@ -194,5 +192,4 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2e-netcp.dtsi"
};
};

115
arch/arm/boot/dts/keystone-k2g-evm.dts
View File

@ -1,16 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G EVM
*
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
@ -45,22 +37,6 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ecap0_pins: ecap0_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */
K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */
K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */
K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */
>;
};
};
&k2g_pinctrl {
@ -105,6 +81,39 @@
>;
};
ecap0_pins: ecap0_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */
K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */
K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */
K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */
>;
};
qspi_pins: pinmux_qspi_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */
K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */
K2G_CORE_IOPAD(0x1210) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d1.qspi_d1 */
K2G_CORE_IOPAD(0x1214) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d2.qspi_d2 */
K2G_CORE_IOPAD(0x1218) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d3.qspi_d3 */
K2G_CORE_IOPAD(0x121c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_csn0.qspi_csn0 */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x11ec) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart2_rxd.uart2_rxd */
K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart2_txd.uart2_txd */
>;
};
};
&uart0 {
@ -129,6 +138,7 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vcc3v3_dcin_reg>; /* VCC3V3_EMMC is connected to VCC3V3_DCIN */
ti,non-removable;
status = "okay";
};
@ -205,3 +215,56 @@
};
};
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi_pins>;
cdns,rclk-en;
flash0: m25p80@0 {
compatible = "s25fl512s", "jedec,spi-nor";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>;
#address-cells = <1>;
#size-cells = <1>;
cdns,read-delay = <5>;
cdns,tshsl-ns = <500>;
cdns,tsd2d-ns = <500>;
cdns,tchsh-ns = <119>;
cdns,tslch-ns = <119>;
partition@0 {
label = "QSPI.u-boot-spl-os";
reg = <0x00000000 0x00100000>;
};
partition@1 {
label = "QSPI.u-boot-env";
reg = <0x00100000 0x00040000>;
};
partition@2 {
label = "QSPI.skern";
reg = <0x00140000 0x0040000>;
};
partition@3 {
label = "QSPI.pmmc-firmware";
reg = <0x00180000 0x0040000>;
};
partition@4 {
label = "QSPI.kernel";
reg = <0x001C0000 0x0800000>;
};
partition@5 {
label = "QSPI.file-system";
reg = <0x009C0000 0x3640000>;
};
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};

339
arch/arm/boot/dts/keystone-k2g-ice.dts
View File

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G Industrial Communication Engine EVM
*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0
*/
/dts-v1/;
@ -30,6 +29,191 @@
status = "okay";
};
};
vmain: fixedregulator-vmain {
compatible = "regulator-fixed";
regulator-name = "vmain_fixed";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
v5_0: fixedregulator-v5_0 {
/* TPS54531 */
compatible = "regulator-fixed";
regulator-name = "v5_0_fixed";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain>;
regulator-always-on;
};
vdd_3v3: fixedregulator-vdd_3v3 {
/* TLV62084 */
compatible = "regulator-fixed";
regulator-name = "vdd_3v3_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&v5_0>;
regulator-always-on;
};
vdd_1v8: fixedregulator-vdd_1v8 {
/* TLV62084 */
compatible = "regulator-fixed";
regulator-name = "vdd_1v8_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&v5_0>;
regulator-always-on;
};
vdds_ddr: fixedregulator-vdds_ddr {
/* TLV62080 */
compatible = "regulator-fixed";
regulator-name = "vdds_ddr_fixed";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
vin-supply = <&v5_0>;
regulator-always-on;
};
vref_ddr: fixedregulator-vref_ddr {
/* LP2996A */
compatible = "regulator-fixed";
regulator-name = "vref_ddr_fixed";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <675000>;
vin-supply = <&vdd_3v3>;
regulator-always-on;
};
vtt_ddr: fixedregulator-vtt_ddr {
/* LP2996A */
compatible = "regulator-fixed";
regulator-name = "vtt_ddr_fixed";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <675000>;
vin-supply = <&vdd_3v3>;
regulator-always-on;
};
vdd_0v9: fixedregulator-vdd_0v9 {
/* TPS62180 */
compatible = "regulator-fixed";
regulator-name = "vdd_0v9_fixed";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&v5_0>;
regulator-always-on;
};
vddb: fixedregulator-vddb {
/* TPS22945 */
compatible = "regulator-fixed";
regulator-name = "vddb_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 53 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
gpio-decoder {
compatible = "gpio-decoder";
gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
<&pca9536 2 GPIO_ACTIVE_HIGH>,
<&pca9536 1 GPIO_ACTIVE_HIGH>,
<&pca9536 0 GPIO_ACTIVE_HIGH>;
linux,axis = <0>; /* ABS_X */
decoder-max-value = <9>;
};
leds1 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&user_leds>;
led0 {
label = "status0:red:cpu0";
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu0";
};
led1 {
label = "status0:green:usr";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led2 {
label = "status0:yellow:usr";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led3 {
label = "status1:red:mmc0";
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
led4 {
label = "status1:green:usr";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led5 {
label = "status1:yellow:usr";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led6 {
label = "status2:red:usr";
gpios = <&gpio0 44 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led7 {
label = "status2:green:usr";
gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led8 {
label = "status2:yellow:usr";
gpios = <&gpio0 42 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led9 {
label = "status3:red:usr";
gpios = <&gpio0 41 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led10 {
label = "status3:green:usr";
gpios = <&gpio0 101 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led11 {
label = "status3:yellow:usr";
gpios = <&gpio0 102 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led12 {
label = "status4:green:heartbeat";
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};
&k2g_pinctrl {
@ -39,6 +223,64 @@
K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
qspi_pins: pinmux_qspi_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */
K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */
K2G_CORE_IOPAD(0x1210) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d1.qspi_d1 */
K2G_CORE_IOPAD(0x1214) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d2.qspi_d2 */
K2G_CORE_IOPAD(0x1218) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d3.qspi_d3 */
K2G_CORE_IOPAD(0x121c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_csn0.qspi_csn0 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x10FC) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
K2G_CORE_IOPAD(0x110C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
K2G_CORE_IOPAD(0x1114) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* mmc1_sdcd.gpio0_69 */
K2G_CORE_IOPAD(0x1118) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_sdwp.mmc1_sdwp */
K2G_CORE_IOPAD(0x111C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_pow.mmc1_pow */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
>;
};
user_leds: pinmux_user_leds {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x102c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad11.gpio0_11 */
K2G_CORE_IOPAD(0x1030) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad12.gpio0_12 */
K2G_CORE_IOPAD(0x1034) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad13.gpio0_13 */
K2G_CORE_IOPAD(0x1038) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad14.gpio0_14 */
K2G_CORE_IOPAD(0x103c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad15.gpio0_15 */
K2G_CORE_IOPAD(0x1040) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_clk.gpio0_16 */
K2G_CORE_IOPAD(0x104c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_wen.gpio0_19 */
K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data9.gpio0_44 */
K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data10.gpio0_43 */
K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data11.gpio0_42 */
K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data12.gpio0_41 */
K2G_CORE_IOPAD(0x11b8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn0.gpio0_101 */
K2G_CORE_IOPAD(0x11bc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn1.gpio0_102 */
>;
};
};
&uart0 {
@ -51,3 +293,96 @@
memory-region = <&dsp_common_memory>;
status = "okay";
};
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&qspi_pins>;
cdns,rclk-en;
status = "okay";
flash0: m25p80@0 {
compatible = "s25fl256s1", "jedec,spi-nor";
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>;
#address-cells = <1>;
#size-cells = <1>;
cdns,read-delay = <5>;
cdns,tshsl-ns = <500>;
cdns,tsd2d-ns = <500>;
cdns,tchsh-ns = <119>;
cdns,tslch-ns = <119>;
partition@0 {
label = "QSPI.u-boot";
reg = <0x00000000 0x00100000>;
};
partition@1 {
label = "QSPI.u-boot-env";
reg = <0x00100000 0x00040000>;
};
partition@2 {
label = "QSPI.skern";
reg = <0x00140000 0x0040000>;
};
partition@3 {
label = "QSPI.pmmc-firmware";
reg = <0x00180000 0x0040000>;
};
partition@4 {
label = "QSPI.kernel";
reg = <0x001c0000 0x0800000>;
};
partition@5 {
label = "QSPI.u-boot-spl-os";
reg = <0x009c0000 0x0040000>;
};
partition@6 {
label = "QSPI.file-system";
reg = <0x00a00000 0x1600000>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vdd_3v3>;
cd-gpios = <&gpio0 69 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <400000>;
pca9536: gpio@41 {
compatible = "ti,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vdd_3v3>;
};
};

58
arch/arm/boot/dts/keystone-k2g.dtsi
View File

@ -1,16 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G SOC
*
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -28,6 +20,8 @@
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@ -75,7 +69,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
};
soc {
soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
#pinctrl-cells = <1>;
@ -114,7 +108,32 @@
reg-io-width = <4>;
reg = <0x02530c00 0x100>;
interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
clock-frequency = <200000000>;
clocks = <&k2g_clks 0x2c 0>;
power-domains = <&k2g_pds 0x2c>;
status = "disabled";
};
uart1: serial@02531000 {
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
reg = <0x02531000 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>;
clocks = <&k2g_clks 0x2d 0>;
power-domains = <&k2g_pds 0x2d>;
status = "disabled";
};
uart2: serial@02531400 {
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
reg = <0x02531400 0x100>;
interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
clocks = <&k2g_clks 0x2e 0>;
power-domains = <&k2g_pds 0x2e>;
status = "disabled";
};
@ -372,11 +391,24 @@
dma-names = "tx", "rx";
bus-width = <8>;
ti,needs-special-reset;
ti,non-removable;
max-frequency = <96000000>;
power-domains = <&k2g_pds 0xc>;
clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
clock-names = "fck", "mmchsdb_fck";
};
qspi: qspi@2940000 {
compatible = "ti,k2g-qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x02940000 0x1000>,
<0x24000000 0x4000000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x24000000>;
clocks = <&k2g_clks 0x43 0x0>;
power-domains = <&k2g_pds 0x43>;
status = "disabled";
};

81
arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Kepler/Hawking SoC clock nodes
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
@ -53,7 +50,7 @@ clocks {
reg-names = "control";
};
clktsip: clktsip {
clktsip: clktsip@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@ -63,7 +60,7 @@ clocks {
domain-id = <0>;
};
clksrio: clksrio {
clksrio: clksrio@235002c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso13>;
@ -73,7 +70,7 @@ clocks {
domain-id = <4>;
};
clkhyperlink0: clkhyperlink0 {
clkhyperlink0: clkhyperlink0@2350030 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -83,7 +80,7 @@ clocks {
domain-id = <5>;
};
clkgem1: clkgem1 {
clkgem1: clkgem1@2350040 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -93,7 +90,7 @@ clocks {
domain-id = <9>;
};
clkgem2: clkgem2 {
clkgem2: clkgem2@2350044 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -103,7 +100,7 @@ clocks {
domain-id = <10>;
};
clkgem3: clkgem3 {
clkgem3: clkgem3@2350048 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -113,7 +110,7 @@ clocks {
domain-id = <11>;
};
clkgem4: clkgem4 {
clkgem4: clkgem4@235004c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -123,7 +120,7 @@ clocks {
domain-id = <12>;
};
clkgem5: clkgem5 {
clkgem5: clkgem5@2350050 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -133,7 +130,7 @@ clocks {
domain-id = <13>;
};
clkgem6: clkgem6 {
clkgem6: clkgem6@2350054 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -143,7 +140,7 @@ clocks {
domain-id = <14>;
};
clkgem7: clkgem7 {
clkgem7: clkgem7@2350058 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -153,7 +150,7 @@ clocks {
domain-id = <15>;
};
clkddr31: clkddr31 {
clkddr31: clkddr31@2350060 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -163,7 +160,7 @@ clocks {
domain-id = <16>;
};
clktac: clktac {
clktac: clktac@2350064 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -173,7 +170,7 @@ clocks {
domain-id = <17>;
};
clkrac01: clkrac01 {
clkrac01: clkrac01@2350068 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -183,7 +180,7 @@ clocks {
domain-id = <17>;
};
clkrac23: clkrac23 {
clkrac23: clkrac23@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -193,7 +190,7 @@ clocks {
domain-id = <18>;
};
clkfftc0: clkfftc0 {
clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -203,7 +200,7 @@ clocks {
domain-id = <19>;
};
clkfftc1: clkfftc1 {
clkfftc1: clkfftc1@2350074 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -213,7 +210,7 @@ clocks {
domain-id = <19>;
};
clkfftc2: clkfftc2 {
clkfftc2: clkfftc2@2350078 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -223,7 +220,7 @@ clocks {
domain-id = <20>;
};
clkfftc3: clkfftc3 {
clkfftc3: clkfftc3@235007c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -233,7 +230,7 @@ clocks {
domain-id = <20>;
};
clkfftc4: clkfftc4 {
clkfftc4: clkfftc4@2350080 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -243,7 +240,7 @@ clocks {
domain-id = <20>;
};
clkfftc5: clkfftc5 {
clkfftc5: clkfftc5@2350084 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -253,7 +250,7 @@ clocks {
domain-id = <20>;
};
clkaif: clkaif {
clkaif: clkaif@2350088 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -263,7 +260,7 @@ clocks {
domain-id = <21>;
};
clktcp3d0: clktcp3d0 {
clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -273,7 +270,7 @@ clocks {
domain-id = <22>;
};
clktcp3d1: clktcp3d1 {
clktcp3d1: clktcp3d1@2350090 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -283,7 +280,7 @@ clocks {
domain-id = <22>;
};
clktcp3d2: clktcp3d2 {
clktcp3d2: clktcp3d2@2350094 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -293,7 +290,7 @@ clocks {
domain-id = <23>;
};
clktcp3d3: clktcp3d3 {
clktcp3d3: clktcp3d3@2350098 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -303,7 +300,7 @@ clocks {
domain-id = <23>;
};
clkvcp0: clkvcp0 {
clkvcp0: clkvcp0@235009c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -313,7 +310,7 @@ clocks {
domain-id = <24>;
};
clkvcp1: clkvcp1 {
clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -323,7 +320,7 @@ clocks {
domain-id = <24>;
};
clkvcp2: clkvcp2 {
clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -333,7 +330,7 @@ clocks {
domain-id = <24>;
};
clkvcp3: clkvcp3 {
clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -343,7 +340,7 @@ clocks {
domain-id = <24>;
};
clkvcp4: clkvcp4 {
clkvcp4: clkvcp4@23500ac {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -353,7 +350,7 @@ clocks {
domain-id = <25>;
};
clkvcp5: clkvcp5 {
clkvcp5: clkvcp5@23500b0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -363,7 +360,7 @@ clocks {
domain-id = <25>;
};
clkvcp6: clkvcp6 {
clkvcp6: clkvcp6@23500b4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -373,7 +370,7 @@ clocks {
domain-id = <25>;
};
clkvcp7: clkvcp7 {
clkvcp7: clkvcp7@23500b8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -383,7 +380,7 @@ clocks {
domain-id = <25>;
};
clkbcp: clkbcp {
clkbcp: clkbcp@23500bc {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -393,7 +390,7 @@ clocks {
domain-id = <26>;
};
clkdxb: clkdxb {
clkdxb: clkdxb@23500c0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -403,7 +400,7 @@ clocks {
domain-id = <27>;
};
clkhyperlink1: clkhyperlink1 {
clkhyperlink1: clkhyperlink1@23500c4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -413,7 +410,7 @@ clocks {
domain-id = <28>;
};
clkxge: clkxge {
clkxge: clkxge@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;

59
arch/arm/boot/dts/keystone-k2hk-evm.dts
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Kepler/Hawking EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
@ -29,7 +26,31 @@
};
};
soc {
leds {
compatible = "gpio-leds";
debug1_1 {
label = "keystone:green:debug1";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
};
debug1_2 {
label = "keystone:red:debug1";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
};
debug2 {
label = "keystone:blue:debug2";
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
};
debug3 {
label = "keystone:blue:debug3";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
};
};
};
&soc0 {
clocks {
refclksys: refclksys {
#clock-cells = <0>;
@ -66,30 +87,6 @@
clock-output-names = "refclk-ddr3b";
};
};
};
leds {
compatible = "gpio-leds";
debug1_1 {
label = "keystone:green:debug1";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
};
debug1_2 {
label = "keystone:red:debug1";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
};
debug2 {
label = "keystone:blue:debug2";
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
};
debug3 {
label = "keystone:blue:debug3";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
};
};
};
&usb_phy {
@ -158,7 +155,7 @@
&i2c0 {
dtt@50 {
compatible = "at,24c1024";
compatible = "atmel,24c1024";
reg = <0x50>;
};
};

7
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Hawking Netcp driver
*
* Copyright 2015 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {

11
arch/arm/boot/dts/keystone-k2hk.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Kepler/Hawking soc specific device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
@ -55,8 +52,9 @@
rproc6 = &dsp6;
rproc7 = &dsp7;
};
};
soc {
&soc0 {
/include/ "keystone-k2hk-clocks.dtsi"
msm_ram: msmram@c000000 {
@ -284,5 +282,4 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2hk-netcp.dtsi"
};
};

51
arch/arm/boot/dts/keystone-k2l-clocks.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 lamarr SoC clock nodes
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
@ -44,7 +41,7 @@ clocks {
reg-names = "control";
};
clkdfeiqnsys: clkdfeiqnsys {
clkdfeiqnsys: clkdfeiqnsys@2350004 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -54,7 +51,7 @@ clocks {
domain-id = <0>;
};
clkpcie1: clkpcie1 {
clkpcie1: clkpcie1@235002c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@ -64,7 +61,7 @@ clocks {
domain-id = <4>;
};
clkgem1: clkgem1 {
clkgem1: clkgem1@2350040 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -74,7 +71,7 @@ clocks {
domain-id = <9>;
};
clkgem2: clkgem2 {
clkgem2: clkgem2@2350044 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -84,7 +81,7 @@ clocks {
domain-id = <10>;
};
clkgem3: clkgem3 {
clkgem3: clkgem3@2350048 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@ -94,7 +91,7 @@ clocks {
domain-id = <11>;
};
clktac: clktac {
clktac: clktac@2350064 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -104,7 +101,7 @@ clocks {
domain-id = <17>;
};
clkrac: clkrac {
clkrac: clkrac@2350068 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -114,7 +111,7 @@ clocks {
domain-id = <17>;
};
clkdfepd0: clkdfepd0 {
clkdfepd0: clkdfepd0@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -124,7 +121,7 @@ clocks {
domain-id = <18>;
};
clkfftc0: clkfftc0 {
clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -134,7 +131,7 @@ clocks {
domain-id = <19>;
};
clkosr: clkosr {
clkosr: clkosr@2350088 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -144,7 +141,7 @@ clocks {
domain-id = <21>;
};
clktcp3d0: clktcp3d0 {
clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -154,7 +151,7 @@ clocks {
domain-id = <22>;
};
clktcp3d1: clktcp3d1 {
clktcp3d1: clktcp3d1@2350094 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -164,7 +161,7 @@ clocks {
domain-id = <23>;
};
clkvcp0: clkvcp0 {
clkvcp0: clkvcp0@235009c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -174,7 +171,7 @@ clocks {
domain-id = <24>;
};
clkvcp1: clkvcp1 {
clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -184,7 +181,7 @@ clocks {
domain-id = <24>;
};
clkvcp2: clkvcp2 {
clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -194,7 +191,7 @@ clocks {
domain-id = <24>;
};
clkvcp3: clkvcp3 {
clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -204,7 +201,7 @@ clocks {
domain-id = <24>;
};
clkbcp: clkbcp {
clkbcp: clkbcp@23500bc {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -214,7 +211,7 @@ clocks {
domain-id = <26>;
};
clkdfepd1: clkdfepd1 {
clkdfepd1: clkdfepd1@23500c0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -224,7 +221,7 @@ clocks {
domain-id = <27>;
};
clkfftc1: clkfftc1 {
clkfftc1: clkfftc1@23500c4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -234,7 +231,7 @@ clocks {
domain-id = <28>;
};
clkiqnail: clkiqnail {
clkiqnail: clkiqnail@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@ -244,7 +241,7 @@ clocks {
domain-id = <29>;
};
clkuart2: clkuart2 {
clkuart2: clkuart2@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@ -254,7 +251,7 @@ clocks {
domain-id = <0>;
};
clkuart3: clkuart3 {
clkuart3: clkuart3@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;

13
arch/arm/boot/dts/keystone-k2l-evm.dts
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Lamarr EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
@ -28,8 +25,9 @@
status = "okay";
};
};
};
soc {
&soc0 {
clocks {
refclksys: refclksys {
#clock-cells = <0>;
@ -38,7 +36,6 @@
clock-output-names = "refclk-sys";
};
};
};
};
&usb_phy {
@ -55,7 +52,7 @@
&i2c0 {
dtt@50 {
compatible = "at,24c1024";
compatible = "atmel,24c1024";
reg = <0x50>;
};
};

7
arch/arm/boot/dts/keystone-k2l-netcp.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Lamarr Netcp driver
*
* Copyright 2015 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {

55
arch/arm/boot/dts/keystone-k2l.dtsi
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Lamarr SoC specific device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
@ -39,8 +36,9 @@
rproc2 = &dsp2;
rproc3 = &dsp3;
};
};
soc {
&soc0 {
/include/ "keystone-k2l-clocks.dtsi"
uart2: serial@2348400 {
@ -63,6 +61,50 @@
interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
};
gpio1: gpio@2348000 {
compatible = "ti,keystone-gpio";
reg = <0x02348000 0x100>;
gpio-controller;
#gpio-cells = <2>;
/* HW Interrupts mapped to GPIO pins */
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 154 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 155 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 156 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 161 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 164 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 165 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 166 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 168 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 169 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 171 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 173 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 401 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 402 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 403 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 404 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 405 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 407 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkgpio>;
clock-names = "gpio";
ti,ngpio = <32>;
ti,davinci-gpio-unbanked = <32>;
};
k2l_pmx: pinmux@2620690 {
compatible = "pinctrl-single";
reg = <0x02620690 0xc>;
@ -350,7 +392,6 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2l-netcp.dtsi"
};
};
&spi0 {

18
arch/arm/boot/dts/keystone.dtsi
View File

@ -1,16 +1,11 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
compatible = "ti,keystone";
model = "Texas Instruments Keystone 2 SoC";
@ -25,11 +20,14 @@
spi2 = &spi2;
};
memory {
chosen { };
memory: memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
gic: interrupt-controller {
gic: interrupt-controller@2561000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@ -70,7 +68,7 @@
cpu_on = <0x84000003>;
};
soc {
soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,keystone","simple-bus";