dmaengine: fsl-edma: remove dma_slave_config direction usage
dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Tested-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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5b7d0c9474
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@ -178,19 +178,7 @@ int fsl_edma_slave_config(struct dma_chan *chan,
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{
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struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
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fsl_chan->fsc.dir = cfg->direction;
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if (cfg->direction == DMA_DEV_TO_MEM) {
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fsl_chan->fsc.dev_addr = cfg->src_addr;
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fsl_chan->fsc.addr_width = cfg->src_addr_width;
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fsl_chan->fsc.burst = cfg->src_maxburst;
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fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg->src_addr_width);
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} else if (cfg->direction == DMA_MEM_TO_DEV) {
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fsl_chan->fsc.dev_addr = cfg->dst_addr;
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fsl_chan->fsc.addr_width = cfg->dst_addr_width;
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fsl_chan->fsc.burst = cfg->dst_maxburst;
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fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg->dst_addr_width);
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} else
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return -EINVAL;
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memcpy(&fsl_chan->cfg, cfg, sizeof(*cfg));
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return 0;
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}
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@ -202,7 +190,7 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan,
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struct fsl_edma_desc *edesc = fsl_chan->edesc;
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struct edma_regs *regs = &fsl_chan->edma->regs;
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u32 ch = fsl_chan->vchan.chan.chan_id;
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enum dma_transfer_direction dir = fsl_chan->fsc.dir;
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enum dma_transfer_direction dir = edesc->dirn;
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dma_addr_t cur_addr, dma_addr;
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size_t len, size;
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int i;
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@ -387,7 +375,7 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic(
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u32 src_addr, dst_addr, last_sg, nbytes;
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u16 soff, doff, iter;
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if (!is_slave_direction(fsl_chan->fsc.dir))
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if (!is_slave_direction(direction))
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return NULL;
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sg_len = buf_len / period_len;
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@ -395,9 +383,21 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic(
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if (!fsl_desc)
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return NULL;
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fsl_desc->iscyclic = true;
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fsl_desc->dirn = direction;
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dma_buf_next = dma_addr;
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nbytes = fsl_chan->fsc.addr_width * fsl_chan->fsc.burst;
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if (direction == DMA_MEM_TO_DEV) {
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fsl_chan->attr =
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fsl_edma_get_tcd_attr(fsl_chan->cfg.dst_addr_width);
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nbytes = fsl_chan->cfg.dst_addr_width *
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fsl_chan->cfg.dst_maxburst;
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} else {
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fsl_chan->attr =
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fsl_edma_get_tcd_attr(fsl_chan->cfg.src_addr_width);
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nbytes = fsl_chan->cfg.src_addr_width *
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fsl_chan->cfg.src_maxburst;
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}
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iter = period_len / nbytes;
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for (i = 0; i < sg_len; i++) {
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@ -407,20 +407,20 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic(
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/* get next sg's physical address */
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last_sg = fsl_desc->tcd[(i + 1) % sg_len].ptcd;
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if (fsl_chan->fsc.dir == DMA_MEM_TO_DEV) {
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if (direction == DMA_MEM_TO_DEV) {
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src_addr = dma_buf_next;
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dst_addr = fsl_chan->fsc.dev_addr;
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soff = fsl_chan->fsc.addr_width;
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dst_addr = fsl_chan->cfg.dst_addr;
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soff = fsl_chan->cfg.dst_addr_width;
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doff = 0;
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} else {
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src_addr = fsl_chan->fsc.dev_addr;
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src_addr = fsl_chan->cfg.src_addr;
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dst_addr = dma_buf_next;
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soff = 0;
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doff = fsl_chan->fsc.addr_width;
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doff = fsl_chan->cfg.src_addr_width;
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}
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fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, dst_addr,
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fsl_chan->fsc.attr, soff, nbytes, 0, iter,
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fsl_chan->attr, soff, nbytes, 0, iter,
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iter, doff, last_sg, true, false, true);
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dma_buf_next += period_len;
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}
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@ -441,42 +441,54 @@ struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg(
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u16 soff, doff, iter;
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int i;
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if (!is_slave_direction(fsl_chan->fsc.dir))
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if (!is_slave_direction(direction))
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return NULL;
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fsl_desc = fsl_edma_alloc_desc(fsl_chan, sg_len);
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if (!fsl_desc)
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return NULL;
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fsl_desc->iscyclic = false;
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fsl_desc->dirn = direction;
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if (direction == DMA_MEM_TO_DEV) {
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fsl_chan->attr =
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fsl_edma_get_tcd_attr(fsl_chan->cfg.dst_addr_width);
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nbytes = fsl_chan->cfg.dst_addr_width *
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fsl_chan->cfg.dst_maxburst;
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} else {
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fsl_chan->attr =
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fsl_edma_get_tcd_attr(fsl_chan->cfg.src_addr_width);
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nbytes = fsl_chan->cfg.src_addr_width *
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fsl_chan->cfg.src_maxburst;
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}
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nbytes = fsl_chan->fsc.addr_width * fsl_chan->fsc.burst;
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for_each_sg(sgl, sg, sg_len, i) {
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/* get next sg's physical address */
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last_sg = fsl_desc->tcd[(i + 1) % sg_len].ptcd;
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if (fsl_chan->fsc.dir == DMA_MEM_TO_DEV) {
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if (direction == DMA_MEM_TO_DEV) {
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src_addr = sg_dma_address(sg);
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dst_addr = fsl_chan->fsc.dev_addr;
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soff = fsl_chan->fsc.addr_width;
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dst_addr = fsl_chan->cfg.dst_addr;
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soff = fsl_chan->cfg.dst_addr_width;
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doff = 0;
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} else {
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src_addr = fsl_chan->fsc.dev_addr;
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src_addr = fsl_chan->cfg.src_addr;
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dst_addr = sg_dma_address(sg);
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soff = 0;
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doff = fsl_chan->fsc.addr_width;
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doff = fsl_chan->cfg.src_addr_width;
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}
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iter = sg_dma_len(sg) / nbytes;
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if (i < sg_len - 1) {
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last_sg = fsl_desc->tcd[(i + 1)].ptcd;
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fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr,
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dst_addr, fsl_chan->fsc.attr, soff,
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dst_addr, fsl_chan->attr, soff,
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nbytes, 0, iter, iter, doff, last_sg,
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false, false, true);
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} else {
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last_sg = 0;
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fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr,
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dst_addr, fsl_chan->fsc.attr, soff,
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dst_addr, fsl_chan->attr, soff,
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nbytes, 0, iter, iter, doff, last_sg,
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true, true, false);
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}
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@ -109,14 +109,6 @@ struct fsl_edma_sw_tcd {
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struct fsl_edma_hw_tcd *vtcd;
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};
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struct fsl_edma_slave_config {
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enum dma_transfer_direction dir;
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enum dma_slave_buswidth addr_width;
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u32 dev_addr;
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u32 burst;
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u32 attr;
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};
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struct fsl_edma_chan {
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struct virt_dma_chan vchan;
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enum dma_status status;
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@ -125,7 +117,8 @@ struct fsl_edma_chan {
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u32 slave_id;
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struct fsl_edma_engine *edma;
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struct fsl_edma_desc *edesc;
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struct fsl_edma_slave_config fsc;
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struct dma_slave_config cfg;
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u32 attr;
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struct dma_pool *tcd_pool;
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};
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@ -133,6 +126,7 @@ struct fsl_edma_desc {
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struct virt_dma_desc vdesc;
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struct fsl_edma_chan *echan;
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bool iscyclic;
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enum dma_transfer_direction dirn;
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unsigned int n_tcds;
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struct fsl_edma_sw_tcd tcd[];
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};
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