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tools/power turbostat: fix SPR PC6 limits 

Sapphire Rapids Xeon (SPR) supports 2 flavors of PC6 - PC6N (non-retention) and
PC6R (retention). Before this patch we used ICX package C-state limits, which
was wrong, because ICX has only one PC6 flavor. With this patch, we use SKX PC6
limits for SPR, because they are the same.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Artem Bityutskiy 2022-07-26 18:29:34 +03:00 committed by Len Brown
parent eade39b2bf
commit 0e4d42af81
1 changed files with 1 additions and 1 deletions
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2
tools/power/x86/turbostat/turbostat.c
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@ -3734,11 +3734,11 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
has_misc_feature_control = 1;
break;
case INTEL_FAM6_SKYLAKE_X: /* SKX */
case INTEL_FAM6_SAPPHIRERAPIDS_X: /* SPR */
pkg_cstate_limits = skx_pkg_cstate_limits;
has_misc_feature_control = 1;
break;
case INTEL_FAM6_ICELAKE_X: /* ICX */
case INTEL_FAM6_SAPPHIRERAPIDS_X: /* SPR */
pkg_cstate_limits = icx_pkg_cstate_limits;
has_misc_feature_control = 1;
break;