net: phy: dp83867: Add documentation for CLK_OUT pin muxing
Add documentation of ti,clk-output-sel which can be used to select a specific clock for CLK_OUT. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -25,6 +25,8 @@ Optional property:
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software needs to take when this pin is
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software needs to take when this pin is
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strapped in these modes. See data manual
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strapped in these modes. See data manual
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for details.
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for details.
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- ti,clk-output-sel - Muxing option for CLK_OUT pin - see dt-bindings/net/ti-dp83867.h
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for applicable values.
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Note: ti,min-output-impedance and ti,max-output-impedance are mutually
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Note: ti,min-output-impedance and ti,max-output-impedance are mutually
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exclusive. When both properties are present ti,max-output-impedance
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exclusive. When both properties are present ti,max-output-impedance
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