media: ccs: Fix the op_pll_multiplier address

According to the CCS spec the op_pll_multiplier address is 0x030e,
not 0x031e.

Signed-off-by: Bernhard Wimmer <be.wimm@gmail.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: stable@vger.kernel.org
Fixes: 6493c4b777 ("media: smiapp: Import CCS definitions")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Bernhard Wimmer 2021-04-21 23:33:20 +02:00 committed by Mauro Carvalho Chehab
parent caad794050
commit 0e3e0c9369
3 changed files with 13 additions and 1 deletions

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@ -1,5 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
/* Copyright (C) 2019--2020 Intel Corporation */
/*
* Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs;
* do not modify.
*/
#include "ccs-limits.h"
#include "ccs-regs.h"

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@ -1,5 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
/* Copyright (C) 2019--2020 Intel Corporation */
/*
* Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs;
* do not modify.
*/
#ifndef __CCS_LIMITS_H__
#define __CCS_LIMITS_H__

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@ -1,5 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
/* Copyright (C) 2019--2020 Intel Corporation */
/*
* Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs;
* do not modify.
*/
#ifndef __CCS_REGS_H__
#define __CCS_REGS_H__
@ -202,7 +206,7 @@
#define CCS_R_OP_PIX_CLK_DIV (0x0308 | CCS_FL_16BIT)
#define CCS_R_OP_SYS_CLK_DIV (0x030a | CCS_FL_16BIT)
#define CCS_R_OP_PRE_PLL_CLK_DIV (0x030c | CCS_FL_16BIT)
#define CCS_R_OP_PLL_MULTIPLIER (0x031e | CCS_FL_16BIT)
#define CCS_R_OP_PLL_MULTIPLIER (0x030e | CCS_FL_16BIT)
#define CCS_R_PLL_MODE 0x0310
#define CCS_PLL_MODE_SHIFT 0U
#define CCS_PLL_MODE_MASK 0x1