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drm/amdgpu/swSMU: remove eeprom from the smu i2c handlers (v2) 

The driver uses it for EEPROM access, but it's just an i2c bus.

v2: change the callback name as well.

Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2020-07-17 09:40:19 -04:00
parent cd65c33c48
commit 0e0e11e71e
4 changed files with 36 additions and 36 deletions
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4
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
View File

@ -844,7 +844,7 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
ret = smu_i2c_eeprom_init(smu, &adev->pm.smu_i2c);
ret = smu_i2c_init(smu, &adev->pm.smu_i2c);
if (ret)
return ret;
@ -1046,7 +1046,7 @@ static int smu_smc_hw_cleanup(struct smu_context *smu)
struct amdgpu_device *adev = smu->adev;
int ret = 0;
smu_i2c_eeprom_fini(smu, &adev->pm.smu_i2c);
smu_i2c_fini(smu, &adev->pm.smu_i2c);
cancel_work_sync(&smu->throttling_logging_work);

60
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
View File

@ -1876,7 +1876,7 @@ static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
return ret;
}
static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t *req, bool write,
static void arcturus_fill_i2c_req(SwI2cRequest_t *req, bool write,
uint8_t address, uint32_t numbytes,
uint8_t *data)
{
@ -1908,7 +1908,7 @@ static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t *req, bool write,
}
}
static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
static int arcturus_i2c_read_data(struct i2c_adapter *control,
uint8_t address,
uint8_t *data,
uint32_t numbytes)
@ -1926,7 +1926,7 @@ static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
}
memset(&req, 0, sizeof(req));
arcturus_fill_eeprom_i2c_req(&req, false, address, numbytes, data);
arcturus_fill_i2c_req(&req, false, address, numbytes, data);
mutex_lock(&adev->smu.mutex);
/* Now read data starting with that address */
@ -1941,18 +1941,18 @@ static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
for (i = 0; i < numbytes; i++)
data[i] = res->SwI2cCmds[i].Data;
dev_dbg(adev->dev, "arcturus_i2c_eeprom_read_data, address = %x, bytes = %d, data :",
dev_dbg(adev->dev, "arcturus_i2c_read_data, address = %x, bytes = %d, data :",
(uint16_t)address, numbytes);
print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
8, 1, data, numbytes, false);
} else
dev_err(adev->dev, "arcturus_i2c_eeprom_read_data - error occurred :%x", ret);
dev_err(adev->dev, "arcturus_i2c_read_data - error occurred :%x", ret);
return ret;
}
static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
static int arcturus_i2c_write_data(struct i2c_adapter *control,
uint8_t address,
uint8_t *data,
uint32_t numbytes)
@ -1968,7 +1968,7 @@ static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
}
memset(&req, 0, sizeof(req));
arcturus_fill_eeprom_i2c_req(&req, true, address, numbytes, data);
arcturus_fill_i2c_req(&req, true, address, numbytes, data);
mutex_lock(&adev->smu.mutex);
ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
@ -1994,7 +1994,7 @@ static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
return ret;
}
static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
static int arcturus_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs, int num)
{
uint32_t i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
@ -2017,18 +2017,18 @@ static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
data_chunk[1] = (next_eeprom_addr & 0xff);
if (msgs[i].flags & I2C_M_RD) {
ret = arcturus_i2c_eeprom_read_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, MAX_SW_I2C_COMMANDS);
ret = arcturus_i2c_read_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, MAX_SW_I2C_COMMANDS);
memcpy(data_ptr, data_chunk + 2, data_chunk_size);
} else {
memcpy(data_chunk + 2, data_ptr, data_chunk_size);
ret = arcturus_i2c_eeprom_write_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, MAX_SW_I2C_COMMANDS);
ret = arcturus_i2c_write_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, MAX_SW_I2C_COMMANDS);
}
if (ret) {
@ -2045,17 +2045,17 @@ static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
data_chunk[1] = (next_eeprom_addr & 0xff);
if (msgs[i].flags & I2C_M_RD) {
ret = arcturus_i2c_eeprom_read_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, (data_size % data_chunk_size) + 2);
ret = arcturus_i2c_read_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, (data_size % data_chunk_size) + 2);
memcpy(data_ptr, data_chunk + 2, data_size % data_chunk_size);
} else {
memcpy(data_chunk + 2, data_ptr, data_size % data_chunk_size);
ret = arcturus_i2c_eeprom_write_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, (data_size % data_chunk_size) + 2);
ret = arcturus_i2c_write_data(i2c_adap,
(uint8_t)msgs[i].addr,
data_chunk, (data_size % data_chunk_size) + 2);
}
if (ret) {
@ -2069,15 +2069,15 @@ fail:
return num;
}
static u32 arcturus_i2c_eeprom_i2c_func(struct i2c_adapter *adap)
static u32 arcturus_i2c_func(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
static const struct i2c_algorithm arcturus_i2c_eeprom_i2c_algo = {
.master_xfer = arcturus_i2c_eeprom_i2c_xfer,
.functionality = arcturus_i2c_eeprom_i2c_func,
static const struct i2c_algorithm arcturus_i2c_algo = {
.master_xfer = arcturus_i2c_xfer,
.functionality = arcturus_i2c_func,
};
static bool arcturus_i2c_adapter_is_added(struct i2c_adapter *control)
@ -2087,7 +2087,7 @@ static bool arcturus_i2c_adapter_is_added(struct i2c_adapter *control)
return control->dev.parent == &adev->pdev->dev;
}
static int arcturus_i2c_eeprom_control_init(struct smu_context *smu, struct i2c_adapter *control)
static int arcturus_i2c_control_init(struct smu_context *smu, struct i2c_adapter *control)
{
struct amdgpu_device *adev = to_amdgpu_device(control);
int res;
@ -2099,8 +2099,8 @@ static int arcturus_i2c_eeprom_control_init(struct smu_context *smu, struct i2c_
control->owner = THIS_MODULE;
control->class = I2C_CLASS_SPD;
control->dev.parent = &adev->pdev->dev;
control->algo = &arcturus_i2c_eeprom_i2c_algo;
snprintf(control->name, sizeof(control->name), "AMDGPU EEPROM");
control->algo = &arcturus_i2c_algo;
snprintf(control->name, sizeof(control->name), "AMDGPU SMU");
res = i2c_add_adapter(control);
if (res)
@ -2109,7 +2109,7 @@ static int arcturus_i2c_eeprom_control_init(struct smu_context *smu, struct i2c_
return res;
}
static void arcturus_i2c_eeprom_control_fini(struct smu_context *smu, struct i2c_adapter *control)
static void arcturus_i2c_control_fini(struct smu_context *smu, struct i2c_adapter *control)
{
if (!arcturus_i2c_adapter_is_added(control))
return;
@ -2275,8 +2275,8 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.get_power_limit = arcturus_get_power_limit,
.is_dpm_running = arcturus_is_dpm_running,
.dpm_set_vcn_enable = arcturus_dpm_set_vcn_enable,
.i2c_eeprom_init = arcturus_i2c_eeprom_control_init,
.i2c_eeprom_fini = arcturus_i2c_eeprom_control_fini,
.i2c_init = arcturus_i2c_control_init,
.i2c_fini = arcturus_i2c_control_fini,
.get_unique_id = arcturus_get_unique_id,
.init_microcode = smu_v11_0_init_microcode,
.load_microcode = smu_v11_0_load_microcode,

4
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View File

@ -503,8 +503,8 @@ struct pptable_funcs {
int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate state);
int (*allow_xgmi_power_down)(struct smu_context *smu, bool en);
int (*update_pcie_parameters)(struct smu_context *smu, uint32_t pcie_gen_cap, uint32_t pcie_width_cap);
int (*i2c_eeprom_init)(struct smu_context *smu, struct i2c_adapter *control);
void (*i2c_eeprom_fini)(struct smu_context *smu, struct i2c_adapter *control);
int (*i2c_init)(struct smu_context *smu, struct i2c_adapter *control);
void (*i2c_fini)(struct smu_context *smu, struct i2c_adapter *control);
void (*get_unique_id)(struct smu_context *smu);
int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
int (*init_microcode)(struct smu_context *smu);

4
drivers/gpu/drm/amd/powerplay/smu_internal.h
View File

@ -88,8 +88,8 @@
#define smu_update_pcie_parameters(smu, pcie_gen_cap, pcie_width_cap) smu_ppt_funcs(update_pcie_parameters, 0, smu, pcie_gen_cap, pcie_width_cap)
#define smu_disable_umc_cdr_12gbps_workaround(smu) smu_ppt_funcs(disable_umc_cdr_12gbps_workaround, 0, smu)
#define smu_set_power_source(smu, power_src) smu_ppt_funcs(set_power_source, 0, smu, power_src)
#define smu_i2c_eeprom_init(smu, control) smu_ppt_funcs(i2c_eeprom_init, 0, smu, control)
#define smu_i2c_eeprom_fini(smu, control) smu_ppt_funcs(i2c_eeprom_fini, 0, smu, control)
#define smu_i2c_init(smu, control) smu_ppt_funcs(i2c_init, 0, smu, control)
#define smu_i2c_fini(smu, control) smu_ppt_funcs(i2c_fini, 0, smu, control)
#define smu_get_unique_id(smu) smu_ppt_funcs(get_unique_id, 0, smu)
#define smu_log_thermal_throttling(smu) smu_ppt_funcs(log_thermal_throttling_event, 0, smu)
#define smu_get_asic_power_limits(smu) smu_ppt_funcs(get_power_limit, 0, smu)