Merge commit '81fd23e2b3ccf71c807e671444e8accaba98ca53' of https://git.pengutronix.de/git/lst/linux into drm-next
things are still slow in etnaviv land. Just one hardware support addition for the GPU found on the NXP Layerscape LS1028A SoC from Michael and the GEM mmap cleanup from Thomas. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Lucas Stach <l.stach@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/4d16197fa5e4147117fea842f1ed9f0fdadb1d57.camel@pengutronix.de
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commit
0def4b732b
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@ -468,17 +468,7 @@ static const struct drm_ioctl_desc etnaviv_ioctls[] = {
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ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
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};
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static const struct file_operations fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.compat_ioctl = drm_compat_ioctl,
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.poll = drm_poll,
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.read = drm_read,
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.llseek = no_llseek,
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.mmap = etnaviv_gem_mmap,
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};
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DEFINE_DRM_GEM_FOPS(fops);
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static const struct drm_driver etnaviv_drm_driver = {
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.driver_features = DRIVER_GEM | DRIVER_RENDER,
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@ -487,7 +477,7 @@ static const struct drm_driver etnaviv_drm_driver = {
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
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.gem_prime_mmap = etnaviv_gem_prime_mmap,
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.gem_prime_mmap = drm_gem_prime_mmap,
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#ifdef CONFIG_DEBUG_FS
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.debugfs_init = etnaviv_debugfs_init,
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#endif
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@ -47,12 +47,9 @@ struct etnaviv_drm_private {
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int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
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struct drm_file *file);
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int etnaviv_gem_mmap(struct file *filp, struct vm_area_struct *vma);
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int etnaviv_gem_mmap_offset(struct drm_gem_object *obj, u64 *offset);
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struct sg_table *etnaviv_gem_prime_get_sg_table(struct drm_gem_object *obj);
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int etnaviv_gem_prime_vmap(struct drm_gem_object *obj, struct dma_buf_map *map);
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int etnaviv_gem_prime_mmap(struct drm_gem_object *obj,
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struct vm_area_struct *vma);
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struct drm_gem_object *etnaviv_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach, struct sg_table *sg);
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int etnaviv_gem_prime_pin(struct drm_gem_object *obj);
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@ -130,8 +130,7 @@ static int etnaviv_gem_mmap_obj(struct etnaviv_gem_object *etnaviv_obj,
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{
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pgprot_t vm_page_prot;
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vma->vm_flags &= ~VM_PFNMAP;
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vma->vm_flags |= VM_MIXEDMAP;
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vma->vm_flags |= VM_IO | VM_MIXEDMAP | VM_DONTEXPAND | VM_DONTDUMP;
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vm_page_prot = vm_get_page_prot(vma->vm_flags);
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@ -154,19 +153,11 @@ static int etnaviv_gem_mmap_obj(struct etnaviv_gem_object *etnaviv_obj,
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return 0;
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}
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int etnaviv_gem_mmap(struct file *filp, struct vm_area_struct *vma)
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static int etnaviv_gem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
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{
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struct etnaviv_gem_object *obj;
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int ret;
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struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
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ret = drm_gem_mmap(filp, vma);
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if (ret) {
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DBG("mmap failed: %d", ret);
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return ret;
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}
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obj = to_etnaviv_bo(vma->vm_private_data);
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return obj->ops->mmap(obj, vma);
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return etnaviv_obj->ops->mmap(etnaviv_obj, vma);
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}
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static vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf)
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@ -567,6 +558,7 @@ static const struct drm_gem_object_funcs etnaviv_gem_object_funcs = {
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.unpin = etnaviv_gem_prime_unpin,
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.get_sg_table = etnaviv_gem_prime_get_sg_table,
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.vmap = etnaviv_gem_prime_vmap,
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.mmap = etnaviv_gem_mmap,
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.vm_ops = &vm_ops,
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};
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@ -34,19 +34,6 @@ int etnaviv_gem_prime_vmap(struct drm_gem_object *obj, struct dma_buf_map *map)
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return 0;
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}
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int etnaviv_gem_prime_mmap(struct drm_gem_object *obj,
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struct vm_area_struct *vma)
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{
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struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
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int ret;
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ret = drm_gem_mmap_obj(obj, obj->size, vma);
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if (ret < 0)
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return ret;
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return etnaviv_obj->ops->mmap(etnaviv_obj, vma);
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}
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int etnaviv_gem_prime_pin(struct drm_gem_object *obj)
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{
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if (!obj->import_attach) {
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@ -613,6 +613,12 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
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etnaviv_is_model_rev(gpu, GC2000, 0x5108))
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pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
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/* Disable SE, RA and TX clock gating on affected core revisions. */
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if (etnaviv_is_model_rev(gpu, GC7000, 0x6202))
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pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
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VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA |
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VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
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pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
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pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;
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@ -37,6 +37,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
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.minor_features10 = 0x0,
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.minor_features11 = 0x0,
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},
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{
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.model = 0x7000,
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.revision = 0x6202,
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.product_id = 0x70003,
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.customer_id = 0,
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.eco_id = 0,
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.stream_count = 8,
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.register_max = 64,
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.thread_count = 512,
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.shader_core_count = 2,
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.vertex_cache_size = 16,
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.vertex_output_buffer_size = 1024,
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.pixel_pipes = 1,
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.instruction_count = 512,
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.num_constants = 320,
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.buffer_size = 0,
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.varyings_count = 16,
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.features = 0xe0287cad,
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.minor_features0 = 0xc1489eff,
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.minor_features1 = 0xfefbfad9,
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.minor_features2 = 0xeb9d4fbf,
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.minor_features3 = 0xedfffced,
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.minor_features4 = 0xdb0dafc7,
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.minor_features5 = 0x3b5ac333,
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.minor_features6 = 0xfccee201,
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.minor_features7 = 0x03fffa6f,
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.minor_features8 = 0x00e10ef0,
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.minor_features9 = 0x0088003c,
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.minor_features10 = 0x00004040,
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.minor_features11 = 0x00000024,
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},
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{
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.model = 0x7000,
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.revision = 0x6204,
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