drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing.
Just makes sure that writes are not being aliased by the CPU cache and do make it out to main memory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24977 Cc: stable@kernel.org
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@ -1386,6 +1386,12 @@ void intel_setup_overlay(struct drm_device *dev)
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goto out_free_bo;
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}
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overlay->flip_addr = overlay->reg_bo->gtt_offset;
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ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
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if (ret) {
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DRM_ERROR("failed to move overlay register bo into the GTT\n");
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goto out_unpin_bo;
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}
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} else {
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ret = i915_gem_attach_phys_object(dev, reg_bo,
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I915_GEM_PHYS_OVERLAY_REGS,
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@ -1418,6 +1424,8 @@ void intel_setup_overlay(struct drm_device *dev)
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DRM_INFO("initialized overlay support\n");
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return;
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out_unpin_bo:
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i915_gem_object_unpin(reg_bo);
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out_free_bo:
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drm_gem_object_unreference(reg_bo);
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out_free:
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