Texas Instruments K3 SoC family changes for v5.7
- Add missing clocks to dwc3 nodes on am65x (fixes USB) - Add DMA entries for main_spi0 on am65x - Add phy-gmii-sel nodes for both am65x and j721e (towards ethernet support) - Add DMA entries for ADC for both am65x and j721e - Add MCU system control module on j721e (needed by phy-gmii-sel) -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAl50ha0QHHQta3Jpc3Rv QHRpLmNvbQAKCRDK+r0xeVAaESy8D/9suvz/dcJ1CLavA2goT3PTmBHvmkmPNi4r DoiNHZ6D4RDLcJwqLHerJ0cuSMHFvyQFcM5tGV3x0c7p1imqJuyTYGm6tYexrHHJ f+sVzF+xOGxgc95+AuZ19SAM9VFwziCbKLaBdUKKJUS2pYrHvZcGQsh16cRZ1jfh yy1GDtBNd75MWPH8NPoal2NKHFJrWsohsawMQ+3UsU9OEoJl2fQkD6Pf0xy7ag+R tVLmtgb8EfWfZq9/7vxzZDUDpOZgmbtF9NsAaQ6a3l9BVf5yOv6bUg9reo5tj5dF xLqDs/4gAAhowyDcpeb6zUDqhAQuz6rQXnfACg718cbbu+ATQW4CfDCf5E0fpL7i a6zSQkCJdaM6UM16S6FG4Ovyh4/MSiNbgpUdOnA11s5dAqCHzmZL4KnWcl9MRV+q R/bfAr9dC9950RYexzpYpky59LY+OjxtoZGUMCWIOEXJOLS/PR/iMuPYNBRH919Z qOGpS/7nIFRa9mvxlBIUwOAtFYmhbRVvFHeOfdOqF4VjYaHBrZY5mHtTXXauVHzS MyrufvbquhSF+mSktmYUd2Fd8DAs5T6tRqRdj7g51Cwq1Lt+0wDy5jlDEho9J3ui BIWgV/cb1B2+0Ql6XQWhf5gPIJ76+QiHR6s6Tf1EwVCG+HOS2w3Xi2Je2uFIfmZ5 h+jNEo9vaA== =XbCt -----END PGP SIGNATURE----- Merge tag 'ti-k3-soc-for-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt Texas Instruments K3 SoC family changes for v5.7 - Add missing clocks to dwc3 nodes on am65x (fixes USB) - Add DMA entries for main_spi0 on am65x - Add phy-gmii-sel nodes for both am65x and j721e (towards ethernet support) - Add DMA entries for ADC for both am65x and j721e - Add MCU system control module on j721e (needed by phy-gmii-sel) * tag 'ti-k3-soc-for-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0 arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes Link: https://lore.kernel.org/r/4b6b7804-4bcb-07ba-5e76-6a411e1f457f@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
0db5ee73df
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@ -189,6 +189,8 @@
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power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
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dma-names = "tx0", "rx0";
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};
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main_spi1: spi@2110000 {
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@ -296,6 +298,7 @@
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
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assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
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assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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<&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
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@ -335,6 +338,7 @@
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interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
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dma-coherent;
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power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 152 2>;
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assigned-clocks = <&k3_clks 152 2>;
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assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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@ -12,6 +12,12 @@
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x40f00000 0x20000>;
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phy_gmii_sel: phy@4040 {
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compatible = "ti,am654-phy-gmii-sel";
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reg = <0x4040 0x4>;
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#phy-cells = <1>;
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};
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};
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mcu_uart0: serial@40a00000 {
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@ -82,6 +88,9 @@
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assigned-clocks = <&k3_clks 0 2>;
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assigned-clock-rates = <60000000>;
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clock-names = "adc_tsc_fck";
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dmas = <&mcu_udmap 0x7100>,
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<&mcu_udmap 0x7101 >;
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dma-names = "fifo0", "fifo1";
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adc {
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#io-channel-cells = <1>;
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@ -97,6 +106,9 @@
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assigned-clocks = <&k3_clks 1 2>;
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assigned-clock-rates = <60000000>;
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clock-names = "adc_tsc_fck";
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dmas = <&mcu_udmap 0x7102>,
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<&mcu_udmap 0x7103>;
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dma-names = "fifo0", "fifo1";
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adc {
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#io-channel-cells = <1>;
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@ -34,6 +34,20 @@
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};
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};
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mcu_conf: syscon@40f00000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x0 0x40f00000 0x0 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x40f00000 0x20000>;
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phy_gmii_sel: phy@4040 {
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compatible = "ti,am654-phy-gmii-sel";
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reg = <0x4040 0x4>;
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#phy-cells = <1>;
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};
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};
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wkup_pmx0: pinmux@4301c000 {
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compatible = "pinctrl-single";
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/* Proxy 0 addressing */
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@ -203,6 +217,9 @@
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assigned-clocks = <&k3_clks 0 3>;
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assigned-clock-rates = <60000000>;
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clock-names = "adc_tsc_fck";
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dmas = <&main_udmap 0x7400>,
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<&main_udmap 0x7401>;
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dma-names = "fifo0", "fifo1";
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adc {
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#io-channel-cells = <1>;
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@ -219,6 +236,9 @@
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assigned-clocks = <&k3_clks 1 3>;
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assigned-clock-rates = <60000000>;
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clock-names = "adc_tsc_fck";
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dmas = <&main_udmap 0x7402>,
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<&main_udmap 0x7403>;
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dma-names = "fifo0", "fifo1";
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adc {
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#io-channel-cells = <1>;
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