UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

drm/amdkfd: Cosmetic cleanup 

Fix some spacing issues, log output, uses of !=NULL/==NULL, unneeded
extra lines and clean up a declaration from =1 to =true for clarity

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kent Russell 2019-05-01 08:23:13 -04:00 committed by Alex Deucher
parent 5980bcaa96
commit 0d87c9cfc0
9 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
View File

@ -149,7 +149,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
}; };
/* this is going to have a few of the MSBs set that we need to /* this is going to have a few of the MSBs set that we need to
* clear */ * clear
*/
bitmap_complement(gpu_resources.queue_bitmap, bitmap_complement(gpu_resources.queue_bitmap,
adev->gfx.mec.queue_bitmap, adev->gfx.mec.queue_bitmap,
KGD_MAX_QUEUES); KGD_MAX_QUEUES);
@ -163,7 +164,8 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
gpu_resources.queue_bitmap); gpu_resources.queue_bitmap);
/* According to linux/bitmap.h we shouldn't use bitmap_clear if /* According to linux/bitmap.h we shouldn't use bitmap_clear if
* nbits is not compile time constant */ * nbits is not compile time constant
*/
last_valid_bit = 1 /* only first MEC can have compute queues */ last_valid_bit = 1 /* only first MEC can have compute queues */
* adev->gfx.mec.num_pipe_per_mec * adev->gfx.mec.num_pipe_per_mec
* adev->gfx.mec.num_queue_per_pipe; * adev->gfx.mec.num_queue_per_pipe;

2
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
View File

@ -310,7 +310,7 @@ static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m)
retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET + retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET; m->sdma_queue_id * KFD_CIK_SDMA_QUEUE_OFFSET;
pr_debug("kfd: sdma base address: 0x%x\n", retval); pr_debug("sdma base address: 0x%x\n", retval);
return retval; return retval;
} }

2
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
View File

@ -266,7 +266,7 @@ static inline uint32_t get_sdma_base_addr(struct vi_sdma_mqd *m)
retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET + retval = m->sdma_engine_id * SDMA1_REGISTER_OFFSET +
m->sdma_queue_id * KFD_VI_SDMA_QUEUE_OFFSET; m->sdma_queue_id * KFD_VI_SDMA_QUEUE_OFFSET;
pr_debug("kfd: sdma base address: 0x%x\n", retval); pr_debug("sdma base address: 0x%x\n", retval);
return retval; return retval;
} }

2
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
View File

@ -1410,7 +1410,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
ret = map_bo_to_gpuvm(adev, entry, ctx.sync, ret = map_bo_to_gpuvm(adev, entry, ctx.sync,
is_invalid_userptr); is_invalid_userptr);
if (ret) { if (ret) {
pr_err("Failed to map radeon bo to gpuvm\n"); pr_err("Failed to map bo to gpuvm\n");
goto map_bo_to_gpuvm_failed; goto map_bo_to_gpuvm_failed;
} }

2
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
View File

@ -522,7 +522,7 @@ static int kfd_ioctl_set_trap_handler(struct file *filep,
struct kfd_process_device *pdd; struct kfd_process_device *pdd;
dev = kfd_device_by_id(args->gpu_id); dev = kfd_device_by_id(args->gpu_id);
if (dev == NULL) if (!dev)
return -EINVAL; return -EINVAL;
mutex_lock(&p->mutex); mutex_lock(&p->mutex);

2
drivers/gpu/drm/amd/amdkfd/kfd_events.c
View File

@ -983,7 +983,7 @@ void kfd_signal_vm_fault_event(struct kfd_dev *dev, unsigned int pasid,
return; /* Presumably process exited. */ return; /* Presumably process exited. */
memset(&memory_exception_data, 0, sizeof(memory_exception_data)); memset(&memory_exception_data, 0, sizeof(memory_exception_data));
memory_exception_data.gpu_id = dev->id; memory_exception_data.gpu_id = dev->id;
memory_exception_data.failure.imprecise = 1; memory_exception_data.failure.imprecise = true;
/* Set failure reason */ /* Set failure reason */
if (info) { if (info) {
memory_exception_data.va = (info->page_addr) << PAGE_SHIFT; memory_exception_data.va = (info->page_addr) << PAGE_SHIFT;

2
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
View File

@ -435,5 +435,3 @@ int kfd_init_apertures(struct kfd_process *process)
return 0; return 0;
} }

2
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
View File

@ -343,7 +343,7 @@ static int init_mqd_sdma(struct mqd_manager *mm, void **mqd,
memset(m, 0, sizeof(struct vi_sdma_mqd)); memset(m, 0, sizeof(struct vi_sdma_mqd));
*mqd = m; *mqd = m;
if (gart_addr != NULL) if (gart_addr)
*gart_addr = (*mqd_mem_obj)->gpu_addr; *gart_addr = (*mqd_mem_obj)->gpu_addr;
retval = mm->update_mqd(mm, m, q); retval = mm->update_mqd(mm, m, q);

2
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
View File

@ -258,7 +258,7 @@ struct kfd_dev {
bool interrupts_active; bool interrupts_active;
/* Debug manager */ /* Debug manager */
struct kfd_dbgmgr *dbgmgr; struct kfd_dbgmgr *dbgmgr;
/* Firmware versions */ /* Firmware versions */
uint16_t mec_fw_version; uint16_t mec_fw_version;