UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

staging: brcm80211: fix "ERROR: Macros w/ complex values ... parenthesis" 

Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Jason Cooper 2010-09-14 09:45:39 -04:00 committed by Greg Kroah-Hartman
parent 7e85c72969
commit 0d706ef4f2
13 changed files with 28 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/staging/brcm80211/include/bcmutils.h
View File

@ -226,7 +226,7 @@ extern "C" {
#define bcm_perf_enable() #define bcm_perf_enable()
#define bcmstats(fmt) #define bcmstats(fmt)
#define bcmlog(fmt, a1, a2) #define bcmlog(fmt, a1, a2)
#define bcmdumplog(buf, size) *buf = '\0' #define bcmdumplog(buf, size) (*buf = '\0')
#define bcmdumplogent(buf, idx) -1 #define bcmdumplogent(buf, idx) -1
#define bcmtslog(tstamp, fmt, a1, a2) #define bcmtslog(tstamp, fmt, a1, a2)
@ -432,7 +432,7 @@ extern "C" {
#define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \ #define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \
& ~((boundary) - 1)) & ~((boundary) - 1))
#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0) #define ISPOWEROF2(x) ((((x)-1)&(x)) == 0)
#define VALID_MASK(mask) !((mask) & ((mask) + 1)) #define VALID_MASK(mask) (!((mask) & ((mask) + 1)))
#ifndef OFFSETOF #ifndef OFFSETOF
#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member) #define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
#endif /* OFFSETOF */ #endif /* OFFSETOF */

2
drivers/staging/brcm80211/include/epivers.h
View File

@ -27,7 +27,7 @@
#define EPI_BUILD_NUMBER 1 #define EPI_BUILD_NUMBER 1
#define EPI_VERSION 5, 75, 11, 0 #define EPI_VERSION { 5, 75, 11, 0 }
#ifdef BCMSDIO #ifdef BCMSDIO
/* EPI_VERSION_NUM must match FW version */ /* EPI_VERSION_NUM must match FW version */

6
drivers/staging/brcm80211/include/linux_osl.h
View File

@ -309,7 +309,7 @@ extern int osl_error(int bcmerror);
#endif /* !defined(CONFIG_MMC_MSM7X00A */ #endif /* !defined(CONFIG_MMC_MSM7X00A */
#define REG_UNMAP(va) iounmap((va)) #define REG_UNMAP(va) iounmap((va))
#define R_SM(r) *(r) #define R_SM(r) (*(r))
#define W_SM(r, v) (*(r) = (v)) #define W_SM(r, v) (*(r) = (v))
#define BZERO_SM(r, len) memset((r), '\0', (len)) #define BZERO_SM(r, len) memset((r), '\0', (len))
@ -329,11 +329,11 @@ extern int osl_error(int bcmerror);
#define PKTPUSH(skb, bytes) skb_push((struct sk_buff*)(skb), (bytes)) #define PKTPUSH(skb, bytes) skb_push((struct sk_buff*)(skb), (bytes))
#define PKTPULL(skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes)) #define PKTPULL(skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes))
#define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb)) #define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb))
#define PKTALLOCED(osh) ((osl_pubinfo_t *)(osh))->pktalloced #define PKTALLOCED(osh) (((osl_pubinfo_t *)(osh))->pktalloced)
#define PKTSETPOOL(osh, skb, x, y) do {} while (0) #define PKTSETPOOL(osh, skb, x, y) do {} while (0)
#define PKTPOOL(osh, skb) FALSE #define PKTPOOL(osh, skb) FALSE
#define PKTUNALLOC(osh) ((osl_pubinfo_t *)(osh))->pktalloced-- #define PKTUNALLOC(osh) (((osl_pubinfo_t *)(osh))->pktalloced--)
#define PKTSETSKIPCT(osh, skb) #define PKTSETSKIPCT(osh, skb)
#define PKTCLRSKIPCT(osh, skb) #define PKTCLRSKIPCT(osh, skb)

2
drivers/staging/brcm80211/include/proto/802.11.h
View File

@ -1282,7 +1282,7 @@ typedef struct ht_cap_ie ht_cap_ie_t;
#define AMPDU_RX_FACTOR_16K 1 #define AMPDU_RX_FACTOR_16K 1
#define AMPDU_RX_FACTOR_32K 2 #define AMPDU_RX_FACTOR_32K 2
#define AMPDU_RX_FACTOR_64K 3 #define AMPDU_RX_FACTOR_64K 3
#define AMPDU_RX_FACTOR_BASE 8*1024 #define AMPDU_RX_FACTOR_BASE (8*1024)
#define AMPDU_DELIMITER_LEN 4 #define AMPDU_DELIMITER_LEN 4

10
drivers/staging/brcm80211/include/sbchipc.h
View File

@ -1299,15 +1299,15 @@ typedef volatile struct {
#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */ #define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */
#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */ #define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */
#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */ #define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */
#define CCTRL4331_GPIOCLK_ON_SPROMCS <1<<5) /* set drive out GPIO_CLK on sprom_cs pin */ #define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */ #define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */
#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */ #define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */
#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */ #define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */
#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */ #define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */
#define CCTRL4331_PCIE_AUXCLKEN <1<<10) /* pcie_auxclkenable */ #define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */
#define CCTRL4331_PCIE_PIPE_PLLDOWN <1<<11) /* pcie_pipe_pllpowerdown */ #define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */
#define CCTRL4331_BT_SHD0_ON_GPIO4 <1<<16) /* enable bt_shd0 at gpio4 */ #define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */
#define CCTRL4331_BT_SHD1_ON_GPIO5 <1<<17) /* enable bt_shd1 at gpio5 */ #define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */
/* 4331 Chip specific ChipStatus register bits */ /* 4331 Chip specific ChipStatus register bits */
#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */ #define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */

2
drivers/staging/brcm80211/phy/phy_version.h
View File

@ -27,7 +27,7 @@
#define PHY_BUILD_NUMBER 0 #define PHY_BUILD_NUMBER 0
#define PHY_VERSION 1, 82, 8, 0 #define PHY_VERSION { 1, 82, 8, 0 }
#define PHY_VERSION_NUM 0x01520800 #define PHY_VERSION_NUM 0x01520800

2
drivers/staging/brcm80211/phy/wlc_phy_int.h
View File

@ -226,7 +226,7 @@ typedef enum {
#define RDR_NTIERS 1 #define RDR_NTIERS 1
#define RDR_TIER_SIZE 64 #define RDR_TIER_SIZE 64
#define RDR_LIST_SIZE 512/3 #define RDR_LIST_SIZE (512/3)
#define RDR_EPOCH_SIZE 40 #define RDR_EPOCH_SIZE 40
#define RDR_NANTENNAS 2 #define RDR_NANTENNAS 2
#define RDR_NTIER_SIZE RDR_LIST_SIZE #define RDR_NTIER_SIZE RDR_LIST_SIZE

4
drivers/staging/brcm80211/sys/wl_mac80211.c
View File

@ -229,8 +229,8 @@ module_param_string(name, name, IFNAMSIZ, 0);
#define WL_MAGIC 0xdeadbeef #define WL_MAGIC 0xdeadbeef
#define HW_TO_WL(hw) hw->priv #define HW_TO_WL(hw) (hw->priv)
#define WL_TO_HW(wl) wl->pub->ieee_hw #define WL_TO_HW(wl) (wl->pub->ieee_hw)
#ifdef WLC_HIGH_ONLY #ifdef WLC_HIGH_ONLY
static int wl_ops_tx_nl(struct ieee80211_hw *hw, struct sk_buff *skb); static int wl_ops_tx_nl(struct ieee80211_hw *hw, struct sk_buff *skb);
#else #else

2
drivers/staging/brcm80211/sys/wlc_ampdu.c
View File

@ -69,7 +69,7 @@
* accumulate between resets. * accumulate between resets.
*/ */
#define TX_SEQ_TO_INDEX(seq) (seq) % AMPDU_TX_BA_MAX_WSIZE #define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE)
/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */ /* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */
#define AMPDU_MAX_MPDU_OVERHEAD (DOT11_FCS_LEN + DOT11_ICV_AES_LEN + AMPDU_DELIMITER_LEN + 3 \ #define AMPDU_MAX_MPDU_OVERHEAD (DOT11_FCS_LEN + DOT11_ICV_AES_LEN + AMPDU_DELIMITER_LEN + 3 \

10
drivers/staging/brcm80211/sys/wlc_channel.c
View File

@ -190,12 +190,12 @@ static const chanvec_t restricted_set_12_13_14 = {
#define LOCALE_CHAN_52_140_ALL (1<<14) #define LOCALE_CHAN_52_140_ALL (1<<14)
#define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */ #define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */
#define LOCALE_CHAN_36_64 LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3 #define LOCALE_CHAN_36_64 (LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
#define LOCALE_CHAN_52_64 LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3 #define LOCALE_CHAN_52_64 (LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
#define LOCALE_CHAN_100_124 LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 #define LOCALE_CHAN_100_124 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2)
#define LOCALE_CHAN_100_140 \ #define LOCALE_CHAN_100_140 \
LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1)
#define LOCALE_CHAN_149_165 LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3 #define LOCALE_CHAN_149_165 (LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3)
#define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4 #define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4
#define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14) #define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14)

8
drivers/staging/brcm80211/sys/wlc_mac80211.h
View File

@ -177,13 +177,13 @@ extern const uint8 prio2fifo[];
#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB) #define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB)
#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \ #define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \
wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val) (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val))
#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \ #define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \
wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val) (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val))
#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \ #define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \
wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val) (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val))
#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \ #define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \
wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val) (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val))
/* PLL requests */ /* PLL requests */
#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */ #define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */

2
drivers/staging/brcm80211/sys/wlc_scb.h
View File

@ -185,7 +185,7 @@ struct scb {
#define SCB_BSSCFG(a) ((a)->bsscfg) #define SCB_BSSCFG(a) ((a)->bsscfg)
#define SCB_SEQNUM(scb, prio) (scb)->seqnum[(prio)] #define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)])
#define SCB_ISMULTI(a) ETHER_ISMULTI((a)->ea.octet) #define SCB_ISMULTI(a) ETHER_ISMULTI((a)->ea.octet)
#define SCB_ISVALID(a, _pkttag_dbgid) ((a) && (a)->_dbgid == (_pkttag_dbgid)) #define SCB_ISVALID(a, _pkttag_dbgid) ((a) && (a)->_dbgid == (_pkttag_dbgid))

2
drivers/staging/brcm80211/util/bcmutils.c
View File

@ -1191,7 +1191,7 @@ static const uint8 crc8_table[256] = {
}; };
#define CRC_INNER_LOOP(n, c, x) \ #define CRC_INNER_LOOP(n, c, x) \
(c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff] ((c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff])
uint8 BCMROMFN(hndcrc8) (uint8 *pdata, /* pointer to array of data to process */ uint8 BCMROMFN(hndcrc8) (uint8 *pdata, /* pointer to array of data to process */
uint nbytes, /* number of input data bytes to process */ uint nbytes, /* number of input data bytes to process */