staging: brcm80211: fix "ERROR: Macros w/ complex values ... parenthesis"
Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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7e85c72969
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0d706ef4f2
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@ -226,7 +226,7 @@ extern "C" {
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#define bcm_perf_enable()
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#define bcmstats(fmt)
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#define bcmlog(fmt, a1, a2)
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#define bcmdumplog(buf, size) *buf = '\0'
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#define bcmdumplog(buf, size) (*buf = '\0')
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#define bcmdumplogent(buf, idx) -1
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#define bcmtslog(tstamp, fmt, a1, a2)
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@ -432,7 +432,7 @@ extern "C" {
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#define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \
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& ~((boundary) - 1))
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#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0)
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#define VALID_MASK(mask) !((mask) & ((mask) + 1))
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#define VALID_MASK(mask) (!((mask) & ((mask) + 1)))
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#ifndef OFFSETOF
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#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
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#endif /* OFFSETOF */
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@ -27,7 +27,7 @@
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#define EPI_BUILD_NUMBER 1
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#define EPI_VERSION 5, 75, 11, 0
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#define EPI_VERSION { 5, 75, 11, 0 }
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#ifdef BCMSDIO
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/* EPI_VERSION_NUM must match FW version */
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@ -309,7 +309,7 @@ extern int osl_error(int bcmerror);
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#endif /* !defined(CONFIG_MMC_MSM7X00A */
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#define REG_UNMAP(va) iounmap((va))
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#define R_SM(r) *(r)
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#define R_SM(r) (*(r))
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#define W_SM(r, v) (*(r) = (v))
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#define BZERO_SM(r, len) memset((r), '\0', (len))
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@ -329,11 +329,11 @@ extern int osl_error(int bcmerror);
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#define PKTPUSH(skb, bytes) skb_push((struct sk_buff*)(skb), (bytes))
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#define PKTPULL(skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes))
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#define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb))
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#define PKTALLOCED(osh) ((osl_pubinfo_t *)(osh))->pktalloced
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#define PKTALLOCED(osh) (((osl_pubinfo_t *)(osh))->pktalloced)
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#define PKTSETPOOL(osh, skb, x, y) do {} while (0)
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#define PKTPOOL(osh, skb) FALSE
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#define PKTUNALLOC(osh) ((osl_pubinfo_t *)(osh))->pktalloced--
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#define PKTUNALLOC(osh) (((osl_pubinfo_t *)(osh))->pktalloced--)
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#define PKTSETSKIPCT(osh, skb)
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#define PKTCLRSKIPCT(osh, skb)
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@ -1282,7 +1282,7 @@ typedef struct ht_cap_ie ht_cap_ie_t;
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#define AMPDU_RX_FACTOR_16K 1
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#define AMPDU_RX_FACTOR_32K 2
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#define AMPDU_RX_FACTOR_64K 3
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#define AMPDU_RX_FACTOR_BASE 8*1024
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#define AMPDU_RX_FACTOR_BASE (8*1024)
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#define AMPDU_DELIMITER_LEN 4
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@ -1299,15 +1299,15 @@ typedef volatile struct {
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#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */
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#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */
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#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */
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#define CCTRL4331_GPIOCLK_ON_SPROMCS <1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
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#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
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#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */
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#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */
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#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */
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#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */
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#define CCTRL4331_PCIE_AUXCLKEN <1<<10) /* pcie_auxclkenable */
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#define CCTRL4331_PCIE_PIPE_PLLDOWN <1<<11) /* pcie_pipe_pllpowerdown */
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#define CCTRL4331_BT_SHD0_ON_GPIO4 <1<<16) /* enable bt_shd0 at gpio4 */
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#define CCTRL4331_BT_SHD1_ON_GPIO5 <1<<17) /* enable bt_shd1 at gpio5 */
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#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */
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#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */
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#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */
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#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */
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/* 4331 Chip specific ChipStatus register bits */
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#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */
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@ -27,7 +27,7 @@
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#define PHY_BUILD_NUMBER 0
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#define PHY_VERSION 1, 82, 8, 0
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#define PHY_VERSION { 1, 82, 8, 0 }
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#define PHY_VERSION_NUM 0x01520800
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@ -226,7 +226,7 @@ typedef enum {
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#define RDR_NTIERS 1
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#define RDR_TIER_SIZE 64
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#define RDR_LIST_SIZE 512/3
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#define RDR_LIST_SIZE (512/3)
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#define RDR_EPOCH_SIZE 40
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#define RDR_NANTENNAS 2
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#define RDR_NTIER_SIZE RDR_LIST_SIZE
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@ -229,8 +229,8 @@ module_param_string(name, name, IFNAMSIZ, 0);
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#define WL_MAGIC 0xdeadbeef
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#define HW_TO_WL(hw) hw->priv
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#define WL_TO_HW(wl) wl->pub->ieee_hw
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#define HW_TO_WL(hw) (hw->priv)
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#define WL_TO_HW(wl) (wl->pub->ieee_hw)
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#ifdef WLC_HIGH_ONLY
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static int wl_ops_tx_nl(struct ieee80211_hw *hw, struct sk_buff *skb);
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#else
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@ -69,7 +69,7 @@
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* accumulate between resets.
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*/
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#define TX_SEQ_TO_INDEX(seq) (seq) % AMPDU_TX_BA_MAX_WSIZE
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#define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE)
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/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */
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#define AMPDU_MAX_MPDU_OVERHEAD (DOT11_FCS_LEN + DOT11_ICV_AES_LEN + AMPDU_DELIMITER_LEN + 3 \
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@ -190,12 +190,12 @@ static const chanvec_t restricted_set_12_13_14 = {
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#define LOCALE_CHAN_52_140_ALL (1<<14)
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#define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */
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#define LOCALE_CHAN_36_64 LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3
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#define LOCALE_CHAN_52_64 LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3
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#define LOCALE_CHAN_100_124 LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2
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#define LOCALE_CHAN_36_64 (LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
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#define LOCALE_CHAN_52_64 (LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
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#define LOCALE_CHAN_100_124 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2)
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#define LOCALE_CHAN_100_140 \
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LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1
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#define LOCALE_CHAN_149_165 LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3
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(LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1)
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#define LOCALE_CHAN_149_165 (LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3)
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#define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4
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#define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14)
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@ -177,13 +177,13 @@ extern const uint8 prio2fifo[];
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#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB)
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#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \
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wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val)
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(wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val))
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#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \
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wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val)
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(wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val))
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#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \
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wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val)
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(wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val))
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#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \
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wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val)
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(wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val))
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/* PLL requests */
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#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */
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@ -185,7 +185,7 @@ struct scb {
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#define SCB_BSSCFG(a) ((a)->bsscfg)
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#define SCB_SEQNUM(scb, prio) (scb)->seqnum[(prio)]
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#define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)])
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#define SCB_ISMULTI(a) ETHER_ISMULTI((a)->ea.octet)
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#define SCB_ISVALID(a, _pkttag_dbgid) ((a) && (a)->_dbgid == (_pkttag_dbgid))
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@ -1191,7 +1191,7 @@ static const uint8 crc8_table[256] = {
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};
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#define CRC_INNER_LOOP(n, c, x) \
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(c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff]
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((c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff])
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uint8 BCMROMFN(hndcrc8) (uint8 *pdata, /* pointer to array of data to process */
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uint nbytes, /* number of input data bytes to process */
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