ASoC: dwc: Add devicetree support for Designware I2S
Allow the driver to be configured through a device tree rather than platform data. Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Andrew Jackson
Mark Brown
parent
d8b58e0b53
commit
0d274544bf
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@ -1,6 +1,7 @@
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config SND_DESIGNWARE_I2S
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tristate "Synopsys I2S Device Driver"
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depends on CLKDEV_LOOKUP
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select SND_SOC_GENERIC_DMAENGINE_PCM
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help
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Say Y or M if you want to add support for I2S driver for
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Synopsys desigwnware I2S device. The device supports upto
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@ -22,6 +22,7 @@
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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/* common register for all channel */
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#define IER 0x000
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@ -82,6 +83,11 @@
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#define MAX_CHANNEL_NUM 8
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#define MIN_CHANNEL_NUM 2
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union dw_i2s_snd_dma_data {
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struct i2s_dma_data pd;
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struct snd_dmaengine_dai_dma_data dt;
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};
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struct dw_i2s_dev {
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void __iomem *i2s_base;
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struct clk *clk;
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@ -90,8 +96,8 @@ struct dw_i2s_dev {
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struct device *dev;
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/* data related to DMA transfers b/w i2s and DMAC */
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struct i2s_dma_data play_dma_data;
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struct i2s_dma_data capture_dma_data;
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union dw_i2s_snd_dma_data play_dma_data;
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union dw_i2s_snd_dma_data capture_dma_data;
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struct i2s_clk_config_data config;
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int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
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};
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@ -178,7 +184,7 @@ static int dw_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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struct i2s_dma_data *dma_data = NULL;
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union dw_i2s_snd_dma_data *dma_data = NULL;
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if (!(dev->capability & DWC_I2S_RECORD) &&
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(substream->stream == SNDRV_PCM_STREAM_CAPTURE))
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@ -270,13 +276,21 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
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config->sample_rate = params_rate(params);
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if (!dev->i2s_clk_cfg)
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return -EINVAL;
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if (dev->i2s_clk_cfg) {
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ret = dev->i2s_clk_cfg(config);
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if (ret < 0) {
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dev_err(dev->dev, "runtime audio clk config fail\n");
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return ret;
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}
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} else {
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u32 bitclk = config->sample_rate * config->data_width * 2;
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ret = dev->i2s_clk_cfg(config);
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if (ret < 0) {
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dev_err(dev->dev, "runtime audio clk config fail\n");
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return ret;
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ret = clk_set_rate(dev->clk, bitclk);
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if (ret) {
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dev_err(dev->dev, "Can't set I2S clock rate: %d\n",
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ret);
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return ret;
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}
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}
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return 0;
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@ -357,6 +371,11 @@ static int dw_i2s_resume(struct snd_soc_dai *dai)
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* block parameter.
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*/
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/* Maximum bit resolution of a channel - not uniformly spaced */
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static const u32 fifo_width[COMP_MAX_WORDSIZE] = {
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12, 16, 20, 24, 32, 0, 0, 0
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};
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/* Width of (DMA) bus */
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static const u32 bus_widths[COMP_MAX_DATA_WIDTH] = {
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DMA_SLAVE_BUSWIDTH_1_BYTE,
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@ -377,10 +396,9 @@ static const u32 formats[COMP_MAX_WORDSIZE] = {
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0
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};
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static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
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static int dw_configure_dai(struct dw_i2s_dev *dev,
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struct snd_soc_dai_driver *dw_i2s_dai,
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struct resource *res,
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const struct i2s_platform_data *pdata)
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unsigned int rates)
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{
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/*
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* Read component parameter registers to extract
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@ -388,23 +406,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
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*/
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u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
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u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2);
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u32 idx = COMP1_APB_DATA_WIDTH(comp1);
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if (WARN_ON(idx >= ARRAY_SIZE(bus_widths)))
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return -EINVAL;
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/* Set DMA slaves info */
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dev->play_dma_data.data = pdata->play_dma_data;
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dev->capture_dma_data.data = pdata->capture_dma_data;
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dev->play_dma_data.addr = res->start + I2S_TXDMA;
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dev->capture_dma_data.addr = res->start + I2S_RXDMA;
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dev->play_dma_data.max_burst = 16;
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dev->capture_dma_data.max_burst = 16;
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dev->play_dma_data.addr_width = bus_widths[idx];
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dev->capture_dma_data.addr_width = bus_widths[idx];
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dev->play_dma_data.filter = pdata->filter;
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dev->capture_dma_data.filter = pdata->filter;
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u32 idx;
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if (COMP1_TX_ENABLED(comp1)) {
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dev_dbg(dev->dev, " designware: play supported\n");
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@ -415,7 +417,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
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dw_i2s_dai->playback.channels_max =
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1 << (COMP1_TX_CHANNELS(comp1) + 1);
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dw_i2s_dai->playback.formats = formats[idx];
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dw_i2s_dai->playback.rates = pdata->snd_rates;
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dw_i2s_dai->playback.rates = rates;
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}
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if (COMP1_RX_ENABLED(comp1)) {
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@ -427,12 +429,88 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
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dw_i2s_dai->capture.channels_max =
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1 << (COMP1_RX_CHANNELS(comp1) + 1);
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dw_i2s_dai->capture.formats = formats[idx];
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dw_i2s_dai->capture.rates = pdata->snd_rates;
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dw_i2s_dai->capture.rates = rates;
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}
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return 0;
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}
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static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
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struct snd_soc_dai_driver *dw_i2s_dai,
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struct resource *res,
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const struct i2s_platform_data *pdata)
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{
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u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
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u32 idx = COMP1_APB_DATA_WIDTH(comp1);
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int ret;
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if (WARN_ON(idx >= ARRAY_SIZE(bus_widths)))
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return -EINVAL;
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ret = dw_configure_dai(dev, dw_i2s_dai, pdata->snd_rates);
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if (ret < 0)
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return ret;
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/* Set DMA slaves info */
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dev->play_dma_data.pd.data = pdata->play_dma_data;
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dev->capture_dma_data.pd.data = pdata->capture_dma_data;
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dev->play_dma_data.pd.addr = res->start + I2S_TXDMA;
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dev->capture_dma_data.pd.addr = res->start + I2S_RXDMA;
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dev->play_dma_data.pd.max_burst = 16;
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dev->capture_dma_data.pd.max_burst = 16;
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dev->play_dma_data.pd.addr_width = bus_widths[idx];
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dev->capture_dma_data.pd.addr_width = bus_widths[idx];
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dev->play_dma_data.pd.filter = pdata->filter;
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dev->capture_dma_data.pd.filter = pdata->filter;
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return 0;
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}
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static int dw_configure_dai_by_dt(struct dw_i2s_dev *dev,
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struct snd_soc_dai_driver *dw_i2s_dai,
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struct resource *res)
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{
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u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
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u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2);
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u32 fifo_depth = 1 << (1 + COMP1_FIFO_DEPTH_GLOBAL(comp1));
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u32 idx = COMP1_APB_DATA_WIDTH(comp1);
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u32 idx2;
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int ret;
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if (WARN_ON(idx >= ARRAY_SIZE(bus_widths)))
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return -EINVAL;
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ret = dw_configure_dai(dev, dw_i2s_dai, SNDRV_PCM_RATE_8000_192000);
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if (ret < 0)
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return ret;
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if (COMP1_TX_ENABLED(comp1)) {
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idx2 = COMP1_TX_WORDSIZE_0(comp1);
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dev->capability |= DWC_I2S_PLAY;
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dev->play_dma_data.dt.addr = res->start + I2S_TXDMA;
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dev->play_dma_data.dt.addr_width = bus_widths[idx];
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dev->play_dma_data.dt.chan_name = "TX";
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dev->play_dma_data.dt.fifo_size = fifo_depth *
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(fifo_width[idx2]) >> 8;
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dev->play_dma_data.dt.maxburst = 16;
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}
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if (COMP1_RX_ENABLED(comp1)) {
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idx2 = COMP2_RX_WORDSIZE_0(comp2);
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dev->capability |= DWC_I2S_RECORD;
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dev->capture_dma_data.dt.addr = res->start + I2S_RXDMA;
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dev->capture_dma_data.dt.addr_width = bus_widths[idx];
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dev->capture_dma_data.dt.chan_name = "RX";
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dev->capture_dma_data.dt.fifo_size = fifo_depth *
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(fifo_width[idx2] >> 8);
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dev->capture_dma_data.dt.maxburst = 16;
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}
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return 0;
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}
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static int dw_i2s_probe(struct platform_device *pdev)
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{
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const struct i2s_platform_data *pdata = pdev->dev.platform_data;
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@ -441,11 +519,6 @@ static int dw_i2s_probe(struct platform_device *pdev)
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int ret;
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struct snd_soc_dai_driver *dw_i2s_dai;
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if (!pdata) {
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dev_err(&pdev->dev, "Invalid platform data\n");
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return -EINVAL;
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}
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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dev_warn(&pdev->dev, "kzalloc fail\n");
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@ -466,15 +539,28 @@ static int dw_i2s_probe(struct platform_device *pdev)
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return PTR_ERR(dev->i2s_base);
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dev->dev = &pdev->dev;
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ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
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if (ret < 0)
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return ret;
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if (pdata) {
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ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
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if (ret < 0)
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return ret;
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dev->capability = pdata->cap;
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dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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dev->capability = pdata->cap;
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dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
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if (!dev->i2s_clk_cfg) {
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dev_err(&pdev->dev, "no clock configure method\n");
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return -ENODEV;
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}
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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} else {
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ret = dw_configure_dai_by_dt(dev, dw_i2s_dai, res);
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if (ret < 0)
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return ret;
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dev->clk = devm_clk_get(&pdev->dev, "i2sclk");
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}
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret < 0)
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@ -488,6 +574,15 @@ static int dw_i2s_probe(struct platform_device *pdev)
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goto err_clk_disable;
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}
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if (!pdata) {
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
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if (ret) {
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dev_err(&pdev->dev,
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"Could not register PCM: %d\n", ret);
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goto err_clk_disable;
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}
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}
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return 0;
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err_clk_disable:
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@ -504,11 +599,23 @@ static int dw_i2s_remove(struct platform_device *pdev)
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id dw_i2s_of_match[] = {
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{ .compatible = "snps,designware-i2s", },
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_i2s_of_match);
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#endif
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static struct platform_driver dw_i2s_driver = {
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.probe = dw_i2s_probe,
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.remove = dw_i2s_remove,
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.driver = {
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.name = "designware-i2s",
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#ifdef CONFIG_OF
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.of_match_table = of_match_ptr(dw_i2s_of_match),
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#endif
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},
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};
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