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drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 

There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.

Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
This commit is contained in:
Yakir Yang 2016-02-15 19:11:05 +08:00
parent bcec20fd5a
commit 0d0abd894e
2 changed files with 23 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
View File

@ -893,8 +893,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
return;
}
ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
dp->video_info.link_rate);
ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
dp->video_info.max_link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@ -1203,16 +1203,25 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
struct device_node *dp_node = dp->dev->of_node;
struct video_info *video_info = &dp->video_info;
if (of_property_read_u32(dp_node, "samsung,link-rate",
&video_info->link_rate)) {
dev_err(dp->dev, "failed to get link-rate\n");
return -EINVAL;
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
&video_info->lane_count)) {
dev_err(dp->dev, "failed to get lane-count\n");
return -EINVAL;
switch (dp->plat_data->dev_type) {
case RK3288_DP:
/*
* Like Rk3288 DisplayPort TRM indicate that "Main link
* containing 4 physical lanes of 2.7/1.62 Gbps/lane".
*/
video_info->max_link_rate = 0x0A;
video_info->max_lane_count = 0x04;
break;
case EXYNOS_DP:
/*
* NOTE: those property parseing code is used for
* providing backward compatibility for samsung platform.
*/
of_property_read_u32(dp_node, "samsung,link-rate",
&video_info->max_link_rate);
of_property_read_u32(dp_node, "samsung,lane-count",
&video_info->max_lane_count);
break;
}
return 0;

4
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
View File

@ -123,8 +123,8 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;
int link_rate;
enum link_lane_count_type lane_count;
int max_link_rate;
enum link_lane_count_type max_lane_count;
};
struct link_train {