ARM: OMAP2+: Drop legacy platform data for am4 qspi
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Jean Pihet <jean.pihet@newoldbits.com> Acked-by: Jean Pihet <jean.pihet@newoldbits.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -369,7 +369,6 @@
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target-module@47900000 {
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compatible = "ti,sysc-omap4", "ti,sysc";
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ti,hwmods = "qspi";
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reg = <0x47900000 0x4>,
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<0x47900010 0x4>;
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reg-names = "rev", "sysc";
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@ -315,32 +315,6 @@ static struct omap_hwmod am43xx_usb_otg_ss1_hwmod = {
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},
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};
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static struct omap_hwmod_class_sysconfig am43xx_qspi_sysc = {
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.rev_offs = 0,
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.sysc_offs = 0x0010,
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.sysc_flags = SYSC_HAS_SIDLEMODE,
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class am43xx_qspi_hwmod_class = {
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.name = "qspi",
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.sysc = &am43xx_qspi_sysc,
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};
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static struct omap_hwmod am43xx_qspi_hwmod = {
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.name = "qspi",
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.class = &am43xx_qspi_hwmod_class,
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.clkdm_name = "l3s_clkdm",
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.main_clk = "l3s_gclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'adc/tsc' class
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@ -681,13 +655,6 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
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.master = &am33xx_l3_s_hwmod,
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.slave = &am43xx_qspi_hwmod,
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.clk = "l3s_gclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
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.master = &am43xx_dss_core_hwmod,
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.slave = &am33xx_l3_main_hwmod,
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@ -783,7 +750,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am43xx_l4_wkup__smartreflex1,
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&am43xx_l4_wkup__timer1,
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&am43xx_l4_wkup__adc_tsc,
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&am43xx_l3_s__qspi,
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&am33xx_l4_per__dcan0,
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&am33xx_l4_per__dcan1,
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&am33xx_l4_ls__timer2,
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