iwlwifi: pcie: allow the op_mode to block the tx queues
In certain flows (see next patches), the op_mode may need to block the Tx queues for a short period. Provide an API for that. The transport is in charge of counting the number of times the queues are blocked since the op_mode may block the queues several times in a row before unblocking them. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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@ -542,6 +542,11 @@ struct iwl_trans_txq_scd_cfg {
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* @wait_tx_queue_empty: wait until tx queues are empty. May sleep.
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* @freeze_txq_timer: prevents the timer of the queue from firing until the
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* queue is set to awake. Must be atomic.
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* @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note
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* that the transport needs to refcount the calls since this function
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* will be called several times with block = true, and then the queues
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* need to be unblocked only after the same number of calls with
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* block = false.
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* @write8: write a u8 to a register at offset ofs from the BAR
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* @write32: write a u32 to a register at offset ofs from the BAR
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* @read32: read a u32 register at offset ofs from the BAR
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@ -600,6 +605,7 @@ struct iwl_trans_ops {
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int (*wait_tx_queue_empty)(struct iwl_trans *trans, u32 txq_bm);
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void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs,
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bool freeze);
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void (*block_txq_ptrs)(struct iwl_trans *trans, bool block);
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void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
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void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
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@ -1010,6 +1016,16 @@ static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
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trans->ops->freeze_txq_timer(trans, txqs, freeze);
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}
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static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans,
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bool block)
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{
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if (unlikely(trans->state != IWL_TRANS_FW_ALIVE))
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IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
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if (trans->ops->block_txq_ptrs)
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trans->ops->block_txq_ptrs(trans, block);
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}
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static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans,
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u32 txqs)
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{
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@ -278,6 +278,7 @@ struct iwl_txq {
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bool frozen;
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u8 active;
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bool ampdu;
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bool block;
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unsigned long wd_timeout;
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};
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@ -1673,6 +1673,33 @@ next_queue:
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}
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}
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static void iwl_trans_pcie_block_txq_ptrs(struct iwl_trans *trans, bool block)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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int i;
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for (i = 0; i < trans->cfg->base_params->num_of_queues; i++) {
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struct iwl_txq *txq = &trans_pcie->txq[i];
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if (i == trans_pcie->cmd_queue)
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continue;
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spin_lock_bh(&txq->lock);
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if (!block && !(WARN_ON_ONCE(!txq->block))) {
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txq->block--;
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if (!txq->block) {
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iwl_write32(trans, HBUS_TARG_WRPTR,
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txq->q.write_ptr | (i << 8));
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}
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} else if (block) {
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txq->block++;
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}
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spin_unlock_bh(&txq->lock);
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}
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}
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#define IWL_FLUSH_WAIT_MS 2000
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static int iwl_trans_pcie_wait_txq_empty(struct iwl_trans *trans, u32 txq_bm)
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@ -2467,6 +2494,7 @@ static const struct iwl_trans_ops trans_ops_pcie = {
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.wait_tx_queue_empty = iwl_trans_pcie_wait_txq_empty,
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.freeze_txq_timer = iwl_trans_pcie_freeze_txq_timer,
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.block_txq_ptrs = iwl_trans_pcie_block_txq_ptrs,
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.write8 = iwl_trans_pcie_write8,
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.write32 = iwl_trans_pcie_write32,
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@ -318,7 +318,9 @@ static void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans,
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* trying to tx (during RFKILL, we're not trying to tx).
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*/
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IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id, txq->q.write_ptr);
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iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
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if (!txq->block)
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iwl_write32(trans, HBUS_TARG_WRPTR,
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txq->q.write_ptr | (txq_id << 8));
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}
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void iwl_pcie_txq_check_wrptrs(struct iwl_trans *trans)
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