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Merge branch 'omap1/multiplatform-prep' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into arm/multiplatform 

This is the full series for converting OMAP1 to multiplatform, rebased
from my 2019 attempt to do the same thing. The soc tree contains simpler
patches to do the same for iop32x, ixp4xx, ep93xx and s3c24xx, which
means we are getting closer to completing this for all ARMv5 platforms
(I have patches for PXA, which is the last one remaining).

Janusz already tested the branch separately and did the missing work
for the common-clk conversion after my previous approach was broken.

Aaro found one regression during additional testing, this is fixed now.

Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-04-21 16:00:23 +02:00
parent c0c237d106 917bf5a312
commit 0cd47616cf
114 changed files with 1185 additions and 1693 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
MAINTAINERS
View File

@ -14386,6 +14386,7 @@ F: arch/arm/boot/dts/am335x-nano.dts
OMAP1 SUPPORT
M: Aaro Koskinen <aaro.koskinen@iki.fi>
M: Janusz Krzysztofik <jmkrzyszt@gmail.com>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
S: Maintained

6
arch/arm/Kconfig
View File

@ -418,14 +418,12 @@ config ARCH_SA1100
config ARCH_OMAP1
bool "TI OMAP1"
depends on CPU_LITTLE_ENDIAN
select ARCH_OMAP
select CLKSRC_MMIO
select FORCE_PCI if PCCARD
select GENERIC_IRQ_CHIP
select GPIOLIB
select HAVE_LEGACY_CLK
select IRQ_DOMAIN
select NEED_MACH_IO_H if PCCARD
select NEED_MACH_MEMORY_H
select SPARSE_IRQ
help
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
@ -586,8 +584,6 @@ source "arch/arm/mach-npcm/Kconfig"
source "arch/arm/mach-nspire/Kconfig"
source "arch/arm/plat-omap/Kconfig"
source "arch/arm/mach-omap1/Kconfig"
source "arch/arm/mach-omap2/Kconfig"

6
arch/arm/Kconfig.debug
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@ -1837,9 +1837,9 @@ config DEBUG_UART_VIRT
default 0xfec00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xfec00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfefb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1
default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2
default 0xfefb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3
default 0xff0b0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1
default 0xff0b0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2
default 0xff0b9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3
default 0xffd01000 if DEBUG_HIP01_UART
default DEBUG_UART_PHYS if !MMU
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \

1
arch/arm/Makefile
View File

@ -224,7 +224,6 @@ machine-$(CONFIG_PLAT_SPEAR) += spear
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_PLAT_ORION) += orion
plat-$(CONFIG_PLAT_PXA) += pxa

57
arch/arm/mach-omap1/Kconfig
View File

@ -28,6 +28,15 @@ config ARCH_OMAP16XX
select CPU_ARM926T
select OMAP_DM_TIMER
config ARCH_OMAP1_ANY
select ARCH_OMAP
def_bool ARCH_OMAP730 || ARCH_OMAP850 || ARCH_OMAP15XX || ARCH_OMAP16XX
config ARCH_OMAP
bool
comment "OMAP Feature Selections"
config OMAP_MUX
bool "OMAP multiplexing support"
default y
@ -53,6 +62,54 @@ config OMAP_MUX_WARNINGS
to change the pin multiplexing setup. When there are no warnings
printed, it's safe to deselect OMAP_MUX for your product.
config OMAP_32K_TIMER
bool "Use 32KHz timer"
depends on ARCH_OMAP16XX
default ARCH_OMAP16XX
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX.
On OMAP2PLUS this value is only used for CONFIG_HZ and
CLOCK_TICK_RATE compile time calculation.
The actual timer selection is done in the board file
through the (DT_)MACHINE_START structure.
config OMAP_MPU_TIMER
bool "Use mpu timer"
depends on ARCH_OMAP1
help
Select this option if you want to use the OMAP mpu timer. This
timer provides more intra-tick resolution than the 32KHz timer,
but consumes more power.
config OMAP_SERIAL_WAKE
bool "Enable wake-up events for serial ports"
depends on ARCH_OMAP1 && OMAP_MUX
default y
help
Select this option if you want to have your system wake up
to data on the serial RX line. This allows you to wake the
system from serial console.
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
help
Say Y if you want to reset unused clocks during boot.
This option saves power, but assumes all drivers are
using the clock framework. Broken drivers that do not
yet use clock framework may not work with this option.
If you are booting from another operating system, you
probably do not want this option enabled until your
device drivers work properly.
config ARCH_OMAP_OTG
bool
comment "OMAP Board Type"
config MACH_OMAP_INNOVATOR

6
arch/arm/mach-omap1/Makefile
View File

@ -3,9 +3,11 @@
# Makefile for the linux kernel.
#
ifdef CONFIG_ARCH_OMAP1_ANY
# Common support
obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
serial.o devices.o dma.o fb.o
serial.o devices.o dma.o omap-dma.o fb.o
obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),)
@ -58,6 +60,4 @@ obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o
obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o
obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o
ifneq ($(CONFIG_FB_OMAP),)
obj-y += lcd_dma.o
endif

3
arch/arm/mach-omap1/ams-delta-fiq-handler.S
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@ -13,14 +13,15 @@
#include <linux/linkage.h>
#include <linux/platform_data/ams-delta-fiq.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/assembler.h>
#include <asm/irq.h>
#include "hardware.h"
#include "ams-delta-fiq.h"
#include "board-ams-delta.h"
#include "iomap.h"
#include "soc.h"
/*
* OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c.

2
arch/arm/mach-omap1/ams-delta-fiq.c
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@ -21,7 +21,9 @@
#include <linux/platform_device.h>
#include <asm/fiq.h>
#include <linux/soc/ti/omap1-io.h>
#include "hardware.h"
#include "ams-delta-fiq.h"
#include "board-ams-delta.h"

2
arch/arm/mach-omap1/ams-delta-fiq.h
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@ -16,7 +16,7 @@
#ifndef __AMS_DELTA_FIQ_H
#define __AMS_DELTA_FIQ_H
#include <mach/irqs.h>
#include "irqs.h"
/*
* Interrupt number used for passing control from FIQ to IRQ.

18
arch/arm/mach-omap1/board-ams-delta.c
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@ -28,6 +28,7 @@
#include <linux/omapfb.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/soc/ti/omap1-mux.h>
#include <asm/serial.h>
#include <asm/mach-types.h>
@ -35,11 +36,9 @@
#include <asm/mach/map.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/mux.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "hardware.h"
#include "usb.h"
#include "ams-delta-fiq.h"
#include "board-ams-delta.h"
#include "iomap.h"
@ -407,9 +406,6 @@ static struct gpio_led gpio_leds[] __initdata = {
[LATCH1_PIN_LED_CAMERA] = {
.name = "camera",
.default_state = LEDS_GPIO_DEFSTATE_OFF,
#ifdef CONFIG_LEDS_TRIGGERS
.default_trigger = "ams_delta_camera",
#endif
},
[LATCH1_PIN_LED_ADVERT] = {
.name = "advert",
@ -456,10 +452,6 @@ static struct gpiod_lookup_table leds_gpio_table = {
},
};
#ifdef CONFIG_LEDS_TRIGGERS
DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger);
#endif
static struct platform_device ams_delta_audio_device = {
.name = "ams-delta-audio",
.id = -1,
@ -705,10 +697,6 @@ static void __init ams_delta_init(void)
omap_register_i2c_bus(1, 100, NULL, 0);
omap1_usb_init(&ams_delta_usb_config);
#ifdef CONFIG_LEDS_TRIGGERS
led_trigger_register_simple("ams_delta_camera",
&ams_delta_camera_led_trigger);
#endif
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
/*

10
arch/arm/mach-omap1/board-fsample.c
View File

@ -23,13 +23,13 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include "flash.h"
#include <linux/soc/ti/omap1-io.h>
#include <linux/platform_data/keypad-omap.h>
#include "tc.h"
#include <mach/hardware.h>
#include "mux.h"
#include "flash.h"
#include "hardware.h"
#include "iomap.h"
#include "common.h"
#include "fpga.h"

8
arch/arm/mach-omap1/board-generic.c
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@ -14,15 +14,13 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include <mach/usb.h>
#include "hardware.h"
#include "mux.h"
#include "usb.h"
#include "common.h"
/* assume no Mini-AB port */

14
arch/arm/mach-omap1/board-h2.c
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@ -28,22 +28,20 @@
#include <linux/mfd/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <linux/platform_data/keypad-omap.h>
#include "tc.h"
#include "mux.h"
#include "flash.h"
#include <mach/hardware.h>
#include <mach/usb.h>
#include "hardware.h"
#include "usb.h"
#include "common.h"
#include "board-h2.h"

16
arch/arm/mach-omap1/board-h3.c
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@ -29,6 +29,8 @@
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/omap-dma.h>
#include <linux/leds.h>
#include <asm/setup.h>
@ -37,16 +39,12 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/omap-dma.h>
#include "tc.h"
#include "mux.h"
#include "flash.h"
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/usb.h>
#include "hardware.h"
#include "irqs.h"
#include "usb.h"
#include "common.h"
#include "board-h3.h"

12
arch/arm/mach-omap1/board-htcherald.c
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@ -23,16 +23,16 @@
#include <linux/spi/ads7846.h>
#include <linux/omapfb.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/omap7xx.h>
#include "hardware.h"
#include "omap7xx.h"
#include "mmc.h"
#include <mach/irqs.h>
#include <mach/usb.h>
#include "irqs.h"
#include "usb.h"
#include "common.h"
/* LCD register definition */
@ -170,7 +170,7 @@ static const unsigned int htc_herald_keymap[] = {
KEY(3, 0, KEY_VOLUMEUP), /* Volume up */
KEY(4, 0, KEY_F2), /* Right bar (landscape) */
KEY(5, 0, KEY_MAIL), /* Win key (portrait) */
KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */
KEY(6, 0, KEY_DIRECTORY), /* Right bar (portrait) */
KEY(0, 1, KEY_LEFTCTRL), /* Windows key */
KEY(1, 1, KEY_COMMA),
KEY(2, 1, KEY_M),

34
arch/arm/mach-omap1/board-innovator.c
View File

@ -23,19 +23,17 @@
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/keypad-omap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include "tc.h"
#include "mux.h"
#include "flash.h"
#include <mach/tc.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "hardware.h"
#include "usb.h"
#include "iomap.h"
#include "common.h"
#include "mmc.h"
@ -194,6 +192,9 @@ static struct platform_device innovator1510_smc91x_device = {
static struct platform_device innovator1510_lcd_device = {
.name = "lcd_inn1510",
.id = -1,
.dev = {
.platform_data = (void __force *)OMAP1510_FPGA_LCD_PANEL_CONTROL,
}
};
static struct platform_device innovator1510_spi_device = {
@ -287,6 +288,23 @@ static void __init innovator_init_smc91x(void)
}
#ifdef CONFIG_ARCH_OMAP15XX
/*
* Board specific gang-switched transceiver power on/off.
*/
static int innovator_omap_ohci_transceiver_power(int on)
{
if (on)
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
INNOVATOR_FPGA_CAM_USB_CONTROL);
else
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
INNOVATOR_FPGA_CAM_USB_CONTROL);
return 0;
}
static struct omap_usb_config innovator1510_usb_config __initdata = {
/* for bundled non-standard host and peripheral cables */
.hmc_mode = 4,
@ -297,6 +315,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = {
.register_dev = 1,
.pins[0] = 2,
.transceiver_power = innovator_omap_ohci_transceiver_power,
};
static const struct omap_lcd_config innovator1510_lcd_config __initconst = {

8
arch/arm/mach-omap1/board-nokia770.c
View File

@ -28,11 +28,9 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "mux.h"
#include "hardware.h"
#include "usb.h"
#include "common.h"
#include "clock.h"
#include "mmc.h"

49
arch/arm/mach-omap1/board-osk.c
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@ -42,18 +42,17 @@
#include <linux/mfd/tps65010.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/omap1_bl.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "tc.h"
#include "flash.h"
#include <mach/mux.h>
#include <mach/tc.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "mux.h"
#include "hardware.h"
#include "usb.h"
#include "common.h"
/* Name of the GPIO chip used by the OMAP for GPIOs 0..15 */
@ -153,14 +152,14 @@ static struct resource osk5912_cf_resources[] = {
[0] = {
.flags = IORESOURCE_IRQ,
},
[1] = {
.flags = IORESOURCE_MEM,
},
};
static struct platform_device osk5912_cf_device = {
.name = "omap_cf",
.id = -1,
.dev = {
.platform_data = (void *) 2 /* CS2 */,
},
.num_resources = ARRAY_SIZE(osk5912_cf_resources),
.resource = osk5912_cf_resources,
};
@ -275,13 +274,41 @@ static void __init osk_init_smc91x(void)
omap_writel(l, EMIFS_CCS(1));
}
static void __init osk_init_cf(void)
static void __init osk_init_cf(int seg)
{
struct resource *res = &osk5912_cf_resources[1];
omap_cfg_reg(M7_1610_GPIO62);
if ((gpio_request(62, "cf_irq")) < 0) {
printk("Error requesting gpio 62 for CF irq\n");
return;
}
switch (seg) {
/* NOTE: CS0 could be configured too ... */
case 1:
res->start = OMAP_CS1_PHYS;
break;
case 2:
res->start = OMAP_CS2_PHYS;
break;
case 3:
res->start = omap_cs3_phys();
break;
}
res->end = res->start + SZ_8K - 1;
osk5912_cf_device.dev.platform_data = (void *)(uintptr_t)seg;
/* NOTE: better EMIFS setup might support more cards; but the
* TRM only shows how to affect regular flash signals, not their
* CF/PCMCIA variants...
*/
pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", __func__,
seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
/* the CF I/O IRQ is really active-low */
irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
}
@ -580,7 +607,7 @@ static void __init osk_init(void)
u32 l;
osk_init_smc91x();
osk_init_cf();
osk_init_cf(2); /* CS2 */
/* Workaround for wrong CS3 (NOR flash) timing
* There are some U-Boot versions out there which configure

14
arch/arm/mach-omap1/board-palmte.c
View File

@ -25,21 +25,19 @@
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "tc.h"
#include "flash.h"
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "mux.h"
#include "hardware.h"
#include "usb.h"
#include "mmc.h"
#include "common.h"

14
arch/arm/mach-omap1/board-palmtt.c
View File

@ -24,22 +24,20 @@
#include <linux/omapfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/omap1_bl.h>
#include <linux/platform_data/leds-omap.h>
#include <linux/platform_data/keypad-omap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "tc.h"
#include "flash.h"
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "mux.h"
#include "hardware.h"
#include "usb.h"
#include "common.h"
#define PALMTT_USBDETECT_GPIO 0

14
arch/arm/mach-omap1/board-palmz71.c
View File

@ -28,20 +28,18 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/platform_data/omap1_bl.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/omap-dma.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "tc.h"
#include "flash.h"
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "mux.h"
#include "hardware.h"
#include "usb.h"
#include "common.h"
#define PALMZ71_USBDETECT_GPIO 0

15
arch/arm/mach-omap1/board-perseus2.c
View File

@ -19,17 +19,16 @@
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include "tc.h"
#include "mux.h"
#include "flash.h"
#include <mach/hardware.h>
#include "hardware.h"
#include "iomap.h"
#include "common.h"
#include "fpga.h"
@ -289,6 +288,12 @@ static void __init omap_perseus2_init(void)
omap_cfg_reg(F4_7XX_KBC3);
omap_cfg_reg(E3_7XX_KBC4);
if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) {
/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000;
omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9);
}
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_serial_init();

3
arch/arm/mach-omap1/board-sx1-mmc.c
View File

@ -12,9 +12,8 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "board-sx1.h"
#include "mmc.h"
#if IS_ENABLED(CONFIG_MMC_OMAP)

12
arch/arm/mach-omap1/board-sx1.c
View File

@ -26,20 +26,18 @@
#include <linux/export.h>
#include <linux/omapfb.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/omap-dma.h>
#include "tc.h"
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "flash.h"
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include "mux.h"
#include "board-sx1.h"
#include <mach/hardware.h>
#include <mach/usb.h>
#include "hardware.h"
#include "usb.h"
#include "common.h"
/* Write to I2C device */

104
arch/arm/mach-omap1/clock.c
View File

@ -16,11 +16,11 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "soc.h"
#include "iomap.h"
#include "clock.h"
@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(clockfw_lock);
unsigned long omap1_uart_recalc(struct clk *clk)
{
unsigned int val = __raw_readl(clk->enable_reg);
return val & clk->enable_bit ? 48000000 : 12000000;
return val & 1 << clk->enable_bit ? 48000000 : 12000000;
}
unsigned long omap1_sossi_recalc(struct clk *clk)
@ -734,17 +734,6 @@ unsigned long omap_fixed_divisor_recalc(struct clk *clk)
return clk->parent->rate / clk->fixed_div;
}
void clk_reparent(struct clk *child, struct clk *parent)
{
list_del_init(&child->sibling);
if (parent)
list_add(&child->sibling, &parent->children);
child->parent = parent;
/* now do the debugfs renaming to reattach the child
to the proper parent */
}
/* Propagate rate to children */
void propagate_rate(struct clk *tclk)
{
@ -759,24 +748,6 @@ void propagate_rate(struct clk *tclk)
static LIST_HEAD(root_clks);
/**
* recalculate_root_clocks - recalculate and propagate all root clocks
*
* Recalculates all root clocks (clocks with no parent), which if the
* clock's .recalc is set correctly, should also propagate their rates.
* Called at init.
*/
void recalculate_root_clocks(void)
{
struct clk *clkp;
list_for_each_entry(clkp, &root_clks, sibling) {
if (clkp->recalc)
clkp->rate = clkp->recalc(clkp);
propagate_rate(clkp);
}
}
/**
* clk_preinit - initialize any fields in the struct clk before clk init
* @clk: struct clk * to initialize
@ -827,74 +798,6 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
void clk_enable_init_clocks(void)
{
struct clk *clkp;
list_for_each_entry(clkp, &clocks, node)
if (clkp->flags & ENABLE_ON_INIT)
clk_enable(clkp);
}
/**
* omap_clk_get_by_name - locate OMAP struct clk by its name
* @name: name of the struct clk to locate
*
* Locate an OMAP struct clk by its name. Assumes that struct clk
* names are unique. Returns NULL if not found or a pointer to the
* struct clk if found.
*/
struct clk *omap_clk_get_by_name(const char *name)
{
struct clk *c;
struct clk *ret = NULL;
mutex_lock(&clocks_mutex);
list_for_each_entry(c, &clocks, node) {
if (!strcmp(c->name, name)) {
ret = c;
break;
}
}
mutex_unlock(&clocks_mutex);
return ret;
}
int omap_clk_enable_autoidle_all(void)
{
struct clk *c;
unsigned long flags;
spin_lock_irqsave(&clockfw_lock, flags);
list_for_each_entry(c, &clocks, node)
if (c->ops->allow_idle)
c->ops->allow_idle(c);
spin_unlock_irqrestore(&clockfw_lock, flags);
return 0;
}
int omap_clk_disable_autoidle_all(void)
{
struct clk *c;
unsigned long flags;
spin_lock_irqsave(&clockfw_lock, flags);
list_for_each_entry(c, &clocks, node)
if (c->ops->deny_idle)
c->ops->deny_idle(c);
spin_unlock_irqrestore(&clockfw_lock, flags);
return 0;
}
/*
* Low level helpers
*/
@ -952,7 +855,6 @@ static int __init clk_disable_unused(void)
return 0;
}
late_initcall(clk_disable_unused);
late_initcall(omap_clk_enable_autoidle_all);
#endif
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)

56
arch/arm/mach-omap1/clock.h
View File

@ -43,56 +43,26 @@ struct omap_clk {
/* Temporary, needed during the common clock framework conversion */
#define __clk_get_name(clk) (clk->name)
#define __clk_get_parent(clk) (clk->parent)
#define __clk_get_rate(clk) (clk->rate)
/**
* struct clkops - some clock function pointers
* @enable: fn ptr that enables the current clock in hardware
* @disable: fn ptr that enables the current clock in hardware
* @find_idlest: function returning the IDLEST register for the clock's IP blk
* @find_companion: function returning the "companion" clk reg for the clock
* @allow_idle: fn ptr that enables autoidle for the current clock in hardware
* @deny_idle: fn ptr that disables autoidle for the current clock in hardware
*
* A "companion" clk is an accompanying clock to the one being queried
* that must be enabled for the IP module connected to the clock to
* become accessible by the hardware. Neither @find_idlest nor
* @find_companion should be needed; that information is IP
* block-specific; the hwmod code has been created to handle this, but
* until hwmod data is ready and drivers have been converted to use PM
* runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
* @find_companion must, unfortunately, remain.
*/
struct clkops {
int (*enable)(struct clk *);
void (*disable)(struct clk *);
void (*find_idlest)(struct clk *, void __iomem **,
u8 *, u8 *);
void (*find_companion)(struct clk *, void __iomem **,
u8 *);
void (*allow_idle)(struct clk *);
void (*deny_idle)(struct clk *);
};
/*
* struct clk.flags possibilities
*
* XXX document the rest of the clock flags here
*
* CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
* bits share the same register. This flag allows the
* omap4_dpllmx*() code to determine which GATE_CTRL bit field
* should be used. This is a temporary solution - a better approach
* would be to associate clock type-specific data with the clock,
* similar to the struct dpll_data approach.
*/
#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
#define CLOCK_IDLE_CONTROL (1 << 1)
#define CLOCK_NO_IDLE_PARENT (1 << 2)
#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
#define CLOCK_CLKOUTX2 (1 << 5)
/**
* struct clk - OMAP struct clk
@ -113,9 +83,8 @@ struct clkops {
* @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
* @flags: see "struct clk.flags possibilities" above
* @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
* @src_offset: bitshift for source selection bitfield (OMAP1 only)
*
* XXX @rate_offset, @src_offset should probably be removed and OMAP1
* XXX @rate_offset should probably be removed and OMAP1
* clock code converted to use clksel.
*
* XXX @usecount is poorly named. It should be "enable_count" or
@ -126,7 +95,7 @@ struct clkops {
* clocks and decremented by the clock code when clk_disable() is
* called on child clocks.
*
* XXX @clkdm, @usecount, @children, @sibling should be marked for
* XXX @usecount, @children, @sibling should be marked for
* internal use only.
*
* @children and @sibling are used to optimize parent-to-child clock
@ -153,36 +122,17 @@ struct clk {
u8 fixed_div;
u8 flags;
u8 rate_offset;
u8 src_offset;
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
struct dentry *dent; /* For visible tree hierarchy */
#endif
};
struct clk_functions {
int (*clk_enable)(struct clk *clk);
void (*clk_disable)(struct clk *clk);
long (*clk_round_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_parent)(struct clk *clk, struct clk *parent);
void (*clk_allow_idle)(struct clk *clk);
void (*clk_deny_idle)(struct clk *clk);
void (*clk_disable_unused)(struct clk *clk);
};
extern int clk_init(struct clk_functions *custom_clocks);
extern void clk_preinit(struct clk *clk);
extern int clk_register(struct clk *clk);
extern void clk_reparent(struct clk *child, struct clk *parent);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern void recalculate_root_clocks(void);
extern unsigned long followparent_recalc(struct clk *clk);
extern void clk_enable_init_clocks(void);
unsigned long omap_fixed_divisor_recalc(struct clk *clk);
extern struct clk *omap_clk_get_by_name(const char *name);
extern int omap_clk_enable_autoidle_all(void);
extern int omap_clk_disable_autoidle_all(void);
extern const struct clkops clkops_null;
@ -208,7 +158,6 @@ extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
extern unsigned long omap1_watchdog_recalc(struct clk *clk);
#ifdef CONFIG_OMAP_RESET_CLOCKS
extern void omap1_clk_disable_unused(struct clk *clk);
@ -278,7 +227,6 @@ extern __u32 arm_idlect1_mask;
extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
extern const struct clkops clkops_dspck;
extern const struct clkops clkops_dummy;
extern const struct clkops clkops_uart_16xx;
extern const struct clkops clkops_generic;

27
arch/arm/mach-omap1/clock_data.c
View File

@ -16,14 +16,13 @@
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach-types.h> /* for machine_is_* */
#include "soc.h"
#include <mach/hardware.h>
#include <mach/usb.h> /* for OTG_BASE */
#include "hardware.h"
#include "usb.h" /* for OTG_BASE */
#include "iomap.h"
#include "clock.h"
#include "sram.h"
@ -93,8 +92,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.name = "ck_dpll1out",
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT |
ENABLE_ON_INIT,
.flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
@ -147,7 +145,6 @@ static struct clk arm_gpio_ck = {
.name = "ick",
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = ENABLE_ON_INIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
@ -317,7 +314,6 @@ static struct clk tc2_ck = {
.name = "tc2_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
.flags = ENABLE_ON_INIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
@ -763,15 +759,14 @@ u32 cpu_mask;
int __init omap1_clk_init(void)
{
struct omap_clk *c;
int crystal_type = 0; /* Default 12 MHz */
u32 reg;
#ifdef CONFIG_DEBUG_LL
/*
* Resets some clocks that may be left on from bootloader,
* but leaves serial clocks on.
*/
omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
/* Make sure UART clocks are enabled early */
if (cpu_is_omap16xx())
omap_writel(omap_readl(MOD_CONF_CTRL_0) |
CONF_MOD_UART1_CLK_MODE_R |
CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0);
#endif
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
@ -811,14 +806,12 @@ int __init omap1_clk_init(void)
if (cpu_is_omap7xx())
ck_ref.rate = 13000000;
if (cpu_is_omap16xx() && crystal_type == 2)
ck_ref.rate = 19200000;
pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
omap_readw(ARM_CKCTL));
/* We want to be in syncronous scalable mode */
/* We want to be in synchronous scalable mode */
omap_writew(0x1000, ARM_SYSST);

3
arch/arm/mach-omap1/common.h
View File

@ -31,8 +31,7 @@
#include <asm/exception.h>
#include <mach/irqs.h>
#include "irqs.h"
#include "soc.h"
#include "i2c.h"

12
arch/arm/mach-omap1/devices.c
View File

@ -14,15 +14,15 @@
#include <linux/spi/spi.h>
#include <linux/platform_data/omap-wd-timer.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/mach/map.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include <mach/omap7xx.h>
#include <mach/hardware.h>
#include "tc.h"
#include "mux.h"
#include "omap7xx.h"
#include "hardware.h"
#include "common.h"
#include "clock.h"
#include "mmc.h"
@ -356,7 +356,7 @@ static int __init omap1_init_devices(void)
if (!cpu_class_is_omap1())
return -ENODEV;
omap_sram_init();
omap1_sram_init();
omap1_clk_late_init();
/* please keep these calls, and their implementations above,

2
arch/arm/mach-omap1/dma.c
View File

@ -24,7 +24,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include "tc.h"
#include "soc.h"

19
arch/arm/mach-omap1/fb.c
View File

@ -17,9 +17,12 @@
#include <linux/io.h>
#include <linux/omapfb.h>
#include <linux/dma-mapping.h>
#include <linux/irq.h>
#include <asm/mach/map.h>
#include "irqs.h"
#if IS_ENABLED(CONFIG_FB_OMAP)
static bool omapfb_lcd_configured;
@ -27,6 +30,19 @@ static struct omapfb_platform_data omapfb_config;
static u64 omap_fb_dma_mask = ~(u32)0;
struct resource omap_fb_resources[] = {
{
.name = "irq",
.start = INT_LCD_CTRL,
.flags = IORESOURCE_IRQ,
},
{
.name = "irq",
.start = INT_SOSSI_MATCH,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device omap_fb_device = {
.name = "omapfb",
.id = -1,
@ -35,7 +51,8 @@ static struct platform_device omap_fb_device = {
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &omapfb_config,
},
.num_resources = 0,
.num_resources = ARRAY_SIZE(omap_fb_resources),
.resource = omap_fb_resources,
};
void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)

5
arch/arm/mach-omap1/flash.c
View File

@ -6,11 +6,12 @@
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/soc/ti/omap1-io.h>
#include "tc.h"
#include <mach/tc.h>
#include "flash.h"
#include <mach/hardware.h>
void omap1_set_vpp(struct platform_device *pdev, int enable)
{

3
arch/arm/mach-omap1/fpga.c
View File

@ -24,8 +24,7 @@
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "iomap.h"
#include "common.h"
#include "fpga.h"

3
arch/arm/mach-omap1/gpio15xx.c
View File

@ -18,8 +18,9 @@
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/soc/ti/omap1-soc.h>
#include <mach/irqs.h>
#include "irqs.h"
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000

5
arch/arm/mach-omap1/gpio16xx.c
View File

@ -18,9 +18,10 @@
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/soc/ti/omap1-io.h>
#include <mach/irqs.h>
#include "hardware.h"
#include "irqs.h"
#include "soc.h"
#define OMAP1610_GPIO1_BASE 0xfffbe400

3
arch/arm/mach-omap1/gpio7xx.c
View File

@ -19,8 +19,7 @@
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <mach/irqs.h>
#include "irqs.h"
#include "soc.h"
#define OMAP7XX_GPIO1_BASE 0xfffbc000

134
arch/arm/mach-omap1/include/mach/hardware.h → arch/arm/mach-omap1/hardware.h
View File

@ -1,6 +1,4 @@
/*
* arch/arm/mach-omap1/include/mach/hardware.h
*
* Hardware definitions for TI OMAP processors and boards
*
* NOTE: Please put device driver specific defines into a separate header
@ -37,21 +35,12 @@
#define __ASM_ARCH_OMAP_HARDWARE_H
#include <linux/sizes.h>
#include <linux/soc/ti/omap1-io.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
#include <mach/soc.h>
#include <linux/soc/ti/omap1-soc.h>
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
#include <mach/tc.h>
#include "tc.h"
/* Almost all documentation for chip and board memory maps assumes
* BM is clear. Most devel boards have a switch to control booting
@ -72,7 +61,7 @@ static inline u32 omap_cs3_phys(void)
#endif /* ifndef __ASSEMBLER__ */
#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
#define OMAP1_IO_OFFSET 0x00f00000 /* Virtual IO = 0xff0b0000 */
#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
#include <mach/serial.h>
@ -98,66 +87,6 @@ static inline u32 omap_cs3_phys(void)
#define MPU_TIMER_AR (1 << 1)
#define MPU_TIMER_ST (1 << 0)
/*
* ----------------------------------------------------------------------------
* Clocks
* ----------------------------------------------------------------------------
*/
#define CLKGEN_REG_BASE (0xfffece00)
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
#define CK_RATEF 1
#define CK_IDLEF 2
#define CK_ENABLEF 4
#define CK_SELECTF 8
#define SETARM_IDLE_SHIFT
/* DPLL control registers */
#define DPLL_CTL (0xfffecf00)
/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
/*
* ---------------------------------------------------------------------------
* UPLD
* ---------------------------------------------------------------------------
*/
#define ULPD_REG_BASE (0xfffe0800)
#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
# define SOFT_UDC_REQ (1 << 4)
# define SOFT_USB_CLK_REQ (1 << 3)
# define SOFT_DPLL_REQ (1 << 0)
#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
# define DIS_MMC2_DPLL_REQ (1 << 11)
# define DIS_MMC1_DPLL_REQ (1 << 10)
# define DIS_UART3_DPLL_REQ (1 << 9)
# define DIS_UART2_DPLL_REQ (1 << 8)
# define DIS_UART1_DPLL_REQ (1 << 7)
# define DIS_USB_HOST_DPLL_REQ (1 << 6)
#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
/*
* ---------------------------------------------------------------------------
* Watchdog timer
@ -213,52 +142,6 @@ static inline u32 omap_cs3_phys(void)
#endif
/*
* ----------------------------------------------------------------------------
* System control registers
* ----------------------------------------------------------------------------
*/
#define MOD_CONF_CTRL_0 0xfffe1080
#define MOD_CONF_CTRL_1 0xfffe1110
/*
* ----------------------------------------------------------------------------
* Pin multiplexing registers
* ----------------------------------------------------------------------------
*/
#define FUNC_MUX_CTRL_0 0xfffe1000
#define FUNC_MUX_CTRL_1 0xfffe1004
#define FUNC_MUX_CTRL_2 0xfffe1008
#define COMP_MODE_CTRL_0 0xfffe100c
#define FUNC_MUX_CTRL_3 0xfffe1010
#define FUNC_MUX_CTRL_4 0xfffe1014
#define FUNC_MUX_CTRL_5 0xfffe1018
#define FUNC_MUX_CTRL_6 0xfffe101C
#define FUNC_MUX_CTRL_7 0xfffe1020
#define FUNC_MUX_CTRL_8 0xfffe1024
#define FUNC_MUX_CTRL_9 0xfffe1028
#define FUNC_MUX_CTRL_A 0xfffe102C
#define FUNC_MUX_CTRL_B 0xfffe1030
#define FUNC_MUX_CTRL_C 0xfffe1034
#define FUNC_MUX_CTRL_D 0xfffe1038
#define PULL_DWN_CTRL_0 0xfffe1040
#define PULL_DWN_CTRL_1 0xfffe1044
#define PULL_DWN_CTRL_2 0xfffe1048
#define PULL_DWN_CTRL_3 0xfffe104c
#define PULL_DWN_CTRL_4 0xfffe10ac
/* OMAP-1610 specific multiplexing registers */
#define FUNC_MUX_CTRL_E 0xfffe1090
#define FUNC_MUX_CTRL_F 0xfffe1094
#define FUNC_MUX_CTRL_10 0xfffe1098
#define FUNC_MUX_CTRL_11 0xfffe109c
#define FUNC_MUX_CTRL_12 0xfffe10a0
#define PU_PD_SEL_0 0xfffe10b4
#define PU_PD_SEL_1 0xfffe10b8
#define PU_PD_SEL_2 0xfffe10bc
#define PU_PD_SEL_3 0xfffe10c0
#define PU_PD_SEL_4 0xfffe10c4
/* Timer32K for 1610 and 1710*/
#define OMAP_TIMER32K_BASE 0xFFFBC400
@ -299,15 +182,6 @@ static inline u32 omap_cs3_phys(void)
#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
/*
* ----------------------------------------------------------------------------
* Pulse-Width Light
* ----------------------------------------------------------------------------
*/
#define OMAP_PWL_BASE 0xfffb5800
#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
/*
* ---------------------------------------------------------------------------
* Processor specific defines

3
arch/arm/mach-omap1/i2c.c
View File

@ -7,7 +7,8 @@
#include <linux/i2c.h>
#include <linux/platform_data/i2c-omap.h>
#include <mach/mux.h>
#include "mux.h"
#include "soc.h"
#define OMAP_I2C_SIZE 0x3f

5
arch/arm/mach-omap1/id.c
View File

@ -12,12 +12,11 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/system_info.h>
#include "soc.h"
#include <mach/hardware.h>
#include "hardware.h"
#include "common.h"
#define OMAP_DIE_ID_0 0xfffe1800

45
arch/arm/mach-omap1/include/mach/io.h
View File

@ -1,45 +0,0 @@
/*
* arch/arm/mach-omap1/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#endif

44
arch/arm/mach-omap1/include/mach/lcdc.h
View File

@ -1,44 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/mach-omap1/include/mach/lcdc.h
*
* Extracted from drivers/video/omap/lcdc.c
* Copyright (C) 2004 Nokia Corporation
* Author: Imre Deak <imre.deak@nokia.com>
*/
#ifndef __MACH_LCDC_H__
#define __MACH_LCDC_H__
#define OMAP_LCDC_BASE 0xfffec000
#define OMAP_LCDC_SIZE 256
#define OMAP_LCDC_IRQ INT_LCD_CTRL
#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00)
#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04)
#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08)
#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c)
#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10)
#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14)
#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18)
#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c)
#define OMAP_LCDC_STAT_DONE (1 << 0)
#define OMAP_LCDC_STAT_VSYNC (1 << 1)
#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2)
#define OMAP_LCDC_STAT_ABC (1 << 3)
#define OMAP_LCDC_STAT_LINE_INT (1 << 4)
#define OMAP_LCDC_STAT_FUF (1 << 5)
#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6)
#define OMAP_LCDC_CTRL_LCD_EN (1 << 0)
#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7)
#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10)
#define OMAP_LCDC_IRQ_VSYNC (1 << 2)
#define OMAP_LCDC_IRQ_DONE (1 << 3)
#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4)
#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5)
#define OMAP_LCDC_IRQ_LINE (1 << 6)
#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2)
#endif /* __MACH_LCDC_H__ */

12
arch/arm/mach-omap1/include/mach/memory.h
View File

@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* arch/arm/mach-omap1/include/mach/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/* REVISIT: omap1 legacy drivers still rely on this */
#include <mach/soc.h>
#endif

7
arch/arm/mach-omap1/io.c
View File

@ -9,14 +9,13 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/omap-dma.h>
#include <asm/tlb.h>
#include <asm/mach/map.h>
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/omap-dma.h>
#include "tc.h"
#include "mux.h"
#include "iomap.h"
#include "common.h"
#include "clock.h"

4
arch/arm/mach-omap1/irq.c
View File

@ -47,9 +47,7 @@
#include <asm/mach/irq.h>
#include "soc.h"
#include <mach/hardware.h>
#include "hardware.h"
#include "common.h"
#define IRQ_BANK(irq) ((irq) >> 5)

2
arch/arm/mach-omap1/include/mach/irqs.h → arch/arm/mach-omap1/irqs.h
View File

@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/plat-omap/include/mach/irqs.h
*
* Copyright (C) Greg Lonnon 2001
* Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
*

17
arch/arm/mach-omap1/mcbsp.c
View File

@ -15,14 +15,13 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/omap-dma.h>
#include <mach/mux.h>
#include "soc.h"
#include <linux/soc/ti/omap1-io.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <mach/irqs.h>
#include "mux.h"
#include "soc.h"
#include "irqs.h"
#include "iomap.h"
#define DPS_RSTCT2_PER_EN (1 << 0)
@ -44,8 +43,8 @@ static void omap1_mcbsp_request(unsigned int id)
api_clk = clk_get(NULL, "api_ck");
dsp_clk = clk_get(NULL, "dsp_ck");
if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
clk_enable(api_clk);
clk_enable(dsp_clk);
clk_prepare_enable(api_clk);
clk_prepare_enable(dsp_clk);
/*
* DSP external peripheral reset
@ -63,11 +62,11 @@ static void omap1_mcbsp_free(unsigned int id)
if (id == 0 || id == 2) {
if (--dsp_use == 0) {
if (!IS_ERR(api_clk)) {
clk_disable(api_clk);
clk_disable_unprepare(api_clk);
clk_put(api_clk);
}
if (!IS_ERR(dsp_clk)) {
clk_disable(dsp_clk);
clk_disable_unprepare(dsp_clk);
clk_put(dsp_clk);
}
}

3
arch/arm/mach-omap1/include/mach/mtd-xip.h → arch/arm/mach-omap1/mtd-xip.h
View File

@ -14,7 +14,8 @@
#ifndef __ARCH_OMAP_MTD_XIP_H__
#define __ARCH_OMAP_MTD_XIP_H__
#include <mach/hardware.h>
#include "hardware.h"
#include <linux/soc/ti/omap1-io.h>
#define OMAP_MPU_TIMER_BASE (0xfffec500)
#define OMAP_MPU_TIMER_OFFSET 0x100

6
arch/arm/mach-omap1/mux.c
View File

@ -12,10 +12,10 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/soc/ti/omap1-io.h>
#include <mach/hardware.h>
#include <mach/mux.h>
#include "hardware.h"
#include "mux.h"
#ifdef CONFIG_OMAP_MUX

144
arch/arm/mach-omap1/mux.h Normal file
View File

@ -0,0 +1,144 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Table of the Omap register configurations for the FUNC_MUX and
* PULL_DWN combinations.
*
* Copyright (C) 2004 - 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
*
* Written by Tony Lindgren
*
* NOTE: Please use the following naming style for new pin entries.
* For example, W8_1610_MMC2_DAT0, where:
* - W8 = ball
* - 1610 = 1510 or 1610, none if common for both 1510 and 1610
* - MMC2_DAT0 = function
*/
#ifndef __ASM_ARCH_MUX_H
#define __ASM_ARCH_MUX_H
#include <linux/soc/ti/omap1-mux.h>
#define PU_PD_SEL_NA 0 /* No pu_pd reg available */
#define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
#ifdef CONFIG_OMAP_MUX_DEBUG
#define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
.mux_reg = FUNC_MUX_CTRL_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \
.pull_reg = PULL_DWN_CTRL_##reg, \
.pull_bit = bit, \
.pull_val = status,
#define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \
.pu_pd_reg = PU_PD_SEL_##reg, \
.pu_pd_val = status,
#define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
.mux_reg = OMAP7XX_IO_CONF_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \
.pull_reg = OMAP7XX_IO_CONF_##reg, \
.pull_bit = bit, \
.pull_val = status,
#else
#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \
.pull_bit = bit, \
.pull_val = status,
#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
.pu_pd_val = status,
#define MUX_REG_7XX(reg, mode_offset, mode) \
.mux_reg = OMAP7XX_IO_CONF_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \
.pull_bit = bit, \
.pull_val = status,
#endif /* CONFIG_OMAP_MUX_DEBUG */
#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
pull_reg, pull_bit, pull_status, \
pu_pd_reg, pu_pd_status, debug_status) \
{ \
.name = desc, \
.debug = debug_status, \
MUX_REG(mux_reg, mode_offset, mode) \
PULL_REG(pull_reg, pull_bit, pull_status) \
PU_PD_REG(pu_pd_reg, pu_pd_status) \
},
/*
* OMAP730/850 has a slightly different config for the pin mux.
* - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
* not the FUNC_MUX_CTRL_x regs from hardware.h
* - for pull-up/down, only has one enable bit which is in the same register
* as mux config
*/
#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
pull_bit, pull_status, debug_status)\
{ \
.name = desc, \
.debug = debug_status, \
MUX_REG_7XX(mux_reg, mode_offset, mode) \
PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
PU_PD_REG(NA, 0) \
},
struct pin_config {
char *name;
const unsigned int mux_reg;
unsigned char debug;
const unsigned char mask_offset;
const unsigned char mask;
const char *pull_name;
const unsigned int pull_reg;
const unsigned char pull_val;
const unsigned char pull_bit;
const char *pu_pd_name;
const unsigned int pu_pd_reg;
const unsigned char pu_pd_val;
#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
const char *mux_reg_name;
#endif
};
struct omap_mux_cfg {
struct pin_config *pins;
unsigned long size;
int (*cfg_reg)(const struct pin_config *cfg);
};
#ifdef CONFIG_OMAP_MUX
/* setup pin muxing in Linux */
extern int omap1_mux_init(void);
extern int omap_mux_register(struct omap_mux_cfg *);
#else
/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
static inline int omap1_mux_init(void) { return 0; }
#endif
extern int omap2_mux_init(void);
#endif

8
arch/arm/mach-omap1/ocpi.c
View File

@ -20,9 +20,9 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/soc/ti/omap1-io.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "common.h"
#define OCPI_BASE 0xfffec320
@ -73,7 +73,7 @@ static int __init omap_ocpi_init(void)
if (IS_ERR(ocpi_ck))
return PTR_ERR(ocpi_ck);
clk_enable(ocpi_ck);
clk_prepare_enable(ocpi_ck);
ocpi_enable();
pr_info("OMAP OCPI interconnect driver loaded\n");
@ -87,7 +87,7 @@ static void __exit omap_ocpi_exit(void)
if (!cpu_is_omap16xx())
return;
clk_disable(ocpi_ck);
clk_disable_unprepare(ocpi_ck);
clk_put(ocpi_ck);
}

257
arch/arm/plat-omap/dma.c → arch/arm/mach-omap1/omap-dma.c
View File

@ -34,9 +34,10 @@
#include <linux/omap-dma.h>
#ifdef CONFIG_ARCH_OMAP1
#include <mach/soc.h>
#endif
#include <linux/soc/ti/omap1-io.h>
#include <linux/soc/ti/omap1-soc.h>
#include "tc.h"
/*
* MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
@ -49,22 +50,12 @@
#undef DEBUG
#ifndef CONFIG_ARCH_OMAP1
enum { DMA_CH_ALLOC_DONE, DMA_CH_PARAMS_SET_DONE, DMA_CH_STARTED,
DMA_CH_QUEUED, DMA_CH_NOTSTARTED, DMA_CH_PAUSED, DMA_CH_LINK_ENABLED
};
enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
#endif
#define OMAP_DMA_ACTIVE 0x01
#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff
#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
static struct omap_system_dma_plat_info *p;
static struct omap_dma_dev_attr *d;
static void omap_clear_dma(int lch);
static int enable_1510_mode;
static u32 errata;
@ -88,21 +79,14 @@ static int omap_dma_reserve_channels;
static DEFINE_SPINLOCK(dma_chan_lock);
static struct omap_dma_lch *dma_chan;
static inline void disable_lnk(int lch);
static void omap_disable_channel_irq(int lch);
static inline void omap_enable_channel_irq(int lch);
#ifdef CONFIG_ARCH_OMAP15XX
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
static int omap_dma_in_1510_mode(void)
static inline void omap_disable_channel_irq(int lch)
{
return enable_1510_mode;
/* disable channel interrupts */
p->dma_write(0, CICR, lch);
/* Clear CSR */
p->dma_read(CSR, lch);
}
#else
#define omap_dma_in_1510_mode() 0
#endif
#ifdef CONFIG_ARCH_OMAP1
static inline void set_gdma_dev(int req, int dev)
{
u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4;
@ -114,11 +98,6 @@ static inline void set_gdma_dev(int req, int dev)
l |= (dev - 1) << shift;
omap_writel(l, reg);
}
#else
#define set_gdma_dev(req, dev) do {} while (0)
#define omap_readl(reg) 0
#define omap_writel(val, reg) do {} while (0)
#endif
#ifdef CONFIG_ARCH_OMAP1
void omap_set_dma_priority(int lch, int dst_port, int priority)
@ -167,64 +146,40 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
#endif
EXPORT_SYMBOL(omap_set_dma_priority);
#if IS_ENABLED(CONFIG_USB_OMAP)
#ifdef CONFIG_ARCH_OMAP15XX
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
static int omap_dma_in_1510_mode(void)
{
return enable_1510_mode;
}
#else
#define omap_dma_in_1510_mode() 0
#endif
void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
int frame_count, int sync_mode,
int dma_trigger, int src_or_dst_synch)
{
u32 l;
u16 ccr;
l = p->dma_read(CSDP, lch);
l &= ~0x03;
l |= data_type;
p->dma_write(l, CSDP, lch);
if (dma_omap1()) {
u16 ccr;
ccr = p->dma_read(CCR, lch);
ccr &= ~(1 << 5);
if (sync_mode == OMAP_DMA_SYNC_FRAME)
ccr |= 1 << 5;
p->dma_write(ccr, CCR, lch);
ccr = p->dma_read(CCR2, lch);
ccr &= ~(1 << 2);
if (sync_mode == OMAP_DMA_SYNC_BLOCK)
ccr |= 1 << 2;
p->dma_write(ccr, CCR2, lch);
}
if (dma_omap2plus() && dma_trigger) {
u32 val;
val = p->dma_read(CCR, lch);
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
val &= ~((1 << 23) | (3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f;
if (sync_mode & OMAP_DMA_SYNC_FRAME)
val |= 1 << 5;
else
val &= ~(1 << 5);
if (sync_mode & OMAP_DMA_SYNC_BLOCK)
val |= 1 << 18;
else
val &= ~(1 << 18);
if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
val &= ~(1 << 24); /* dest synch */
val |= (1 << 23); /* Prefetch */
} else if (src_or_dst_synch) {
val |= 1 << 24; /* source synch */
} else {
val &= ~(1 << 24); /* dest synch */
}
p->dma_write(val, CCR, lch);
}
ccr = p->dma_read(CCR, lch);
ccr &= ~(1 << 5);
if (sync_mode == OMAP_DMA_SYNC_FRAME)
ccr |= 1 << 5;
p->dma_write(ccr, CCR, lch);
ccr = p->dma_read(CCR2, lch);
ccr &= ~(1 << 2);
if (sync_mode == OMAP_DMA_SYNC_BLOCK)
ccr |= 1 << 2;
p->dma_write(ccr, CCR2, lch);
p->dma_write(elem_count, CEN, lch);
p->dma_write(frame_count, CFN, lch);
}
@ -232,7 +187,7 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params);
void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
{
if (dma_omap1() && !dma_omap15xx()) {
if (!dma_omap15xx()) {
u32 l;
l = p->dma_read(LCH_CTRL, lch);
@ -249,15 +204,12 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
int src_ei, int src_fi)
{
u32 l;
u16 w;
if (dma_omap1()) {
u16 w;
w = p->dma_read(CSDP, lch);
w &= ~(0x1f << 2);
w |= src_port << 2;
p->dma_write(w, CSDP, lch);
}
w = p->dma_read(CSDP, lch);
w &= ~(0x1f << 2);
w |= src_port << 2;
p->dma_write(w, CSDP, lch);
l = p->dma_read(CCR, lch);
l &= ~(0x03 << 12);
@ -295,26 +247,15 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
case OMAP_DMA_DATA_BURST_DIS:
break;
case OMAP_DMA_DATA_BURST_4:
if (dma_omap2plus())
burst = 0x1;
else
burst = 0x2;
burst = 0x2;
break;
case OMAP_DMA_DATA_BURST_8:
if (dma_omap2plus()) {
burst = 0x2;
break;
}
/*
* not supported by current hardware on OMAP1
* w |= (0x03 << 7);
*/
fallthrough;
case OMAP_DMA_DATA_BURST_16:
if (dma_omap2plus()) {
burst = 0x3;
break;
}
/* OMAP1 don't support burst 16 */
fallthrough;
default:
@ -333,12 +274,10 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
{
u32 l;
if (dma_omap1()) {
l = p->dma_read(CSDP, lch);
l &= ~(0x1f << 9);
l |= dest_port << 9;
p->dma_write(l, CSDP, lch);
}
l = p->dma_read(CSDP, lch);
l &= ~(0x1f << 9);
l |= dest_port << 9;
p->dma_write(l, CSDP, lch);
l = p->dma_read(CCR, lch);
l &= ~(0x03 << 14);
@ -376,22 +315,12 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
case OMAP_DMA_DATA_BURST_DIS:
break;
case OMAP_DMA_DATA_BURST_4:
if (dma_omap2plus())
burst = 0x1;
else
burst = 0x2;
burst = 0x2;
break;
case OMAP_DMA_DATA_BURST_8:
if (dma_omap2plus())
burst = 0x2;
else
burst = 0x3;
burst = 0x3;
break;
case OMAP_DMA_DATA_BURST_16:
if (dma_omap2plus()) {
burst = 0x3;
break;
}
/* OMAP1 don't support burst 16 */
fallthrough;
default:
@ -407,26 +336,12 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
static inline void omap_enable_channel_irq(int lch)
{
/* Clear CSR */
if (dma_omap1())
p->dma_read(CSR, lch);
else
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
p->dma_read(CSR, lch);
/* Enable some nice interrupts. */
p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
}
static inline void omap_disable_channel_irq(int lch)
{
/* disable channel interrupts */
p->dma_write(0, CICR, lch);
/* Clear CSR */
if (dma_omap1())
p->dma_read(CSR, lch);
else
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
}
void omap_disable_dma_irq(int lch, u16 bits)
{
dma_chan[lch].enabled_irqs &= ~bits;
@ -439,8 +354,7 @@ static inline void enable_lnk(int lch)
l = p->dma_read(CLNK_CTRL, lch);
if (dma_omap1())
l &= ~(1 << 14);
l &= ~(1 << 14);
/* Set the ENABLE_LNK bits */
if (dma_chan[lch].next_lch != -1)
@ -458,19 +372,13 @@ static inline void disable_lnk(int lch)
/* Disable interrupts */
omap_disable_channel_irq(lch);
if (dma_omap1()) {
/* Set the STOP_LNK bit */
l |= 1 << 14;
}
if (dma_omap2plus()) {
/* Clear the ENABLE_LNK bit */
l &= ~(1 << 15);
}
/* Set the STOP_LNK bit */
l |= 1 << 14;
p->dma_write(l, CLNK_CTRL, lch);
dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
}
#endif
int omap_request_dma(int dev_id, const char *dev_name,
void (*callback)(int lch, u16 ch_status, void *data),
@ -509,8 +417,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
if (dma_omap1())
chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
if (dma_omap16xx()) {
/* If the sync device is set, configure it dynamically. */
@ -523,7 +430,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
* id.
*/
p->dma_write(dev_id | (1 << 10), CCR, free_ch);
} else if (dma_omap1()) {
} else {
p->dma_write(dev_id, CCR, free_ch);
}
@ -570,6 +477,7 @@ static void omap_clear_dma(int lch)
local_irq_restore(flags);
}
#if IS_ENABLED(CONFIG_USB_OMAP)
void omap_start_dma(int lch)
{
u32 l;
@ -739,8 +647,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
offset = p->dma_read(CSSA, lch);
}
if (dma_omap1())
offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
return offset;
}
@ -778,8 +685,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
offset = p->dma_read(CDSA, lch);
}
if (dma_omap1())
offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
return offset;
}
@ -790,14 +696,14 @@ int omap_get_dma_active_status(int lch)
return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;
}
EXPORT_SYMBOL(omap_get_dma_active_status);
#endif
int omap_dma_running(void)
{
int lch;
if (dma_omap1())
if (omap_lcd_dma_running())
return 1;
if (omap_lcd_dma_running())
return 1;
for (lch = 0; lch < dma_chan_count; lch++)
if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN)
@ -808,8 +714,6 @@ int omap_dma_running(void)
/*----------------------------------------------------------------------------*/
#ifdef CONFIG_ARCH_OMAP1
static int omap1_dma_handle_ch(int ch)
{
u32 csr;
@ -862,10 +766,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
return handled ? IRQ_HANDLED : IRQ_NONE;
}
#else
#define omap1_dma_irq_handler NULL
#endif
struct omap_system_dma_plat_info *omap_get_plat_info(void)
{
return p;
@ -911,29 +811,27 @@ static int omap_system_dma_probe(struct platform_device *pdev)
if (ch >= 6 && enable_1510_mode)
continue;
if (dma_omap1()) {
/*
* request_irq() doesn't like dev_id (ie. ch) being
* zero, so we have to kludge around this.
*/
sprintf(&irq_name[0], "%d", ch);
dma_irq = platform_get_irq_byname(pdev, irq_name);
/*
* request_irq() doesn't like dev_id (ie. ch) being
* zero, so we have to kludge around this.
*/
sprintf(&irq_name[0], "%d", ch);
dma_irq = platform_get_irq_byname(pdev, irq_name);
if (dma_irq < 0) {
ret = dma_irq;
goto exit_dma_irq_fail;
}
/* INT_DMA_LCD is handled in lcd_dma.c */
if (dma_irq == INT_DMA_LCD)
continue;
ret = request_irq(dma_irq,
omap1_dma_irq_handler, 0, "DMA",
(void *) (ch + 1));
if (ret != 0)
goto exit_dma_irq_fail;
if (dma_irq < 0) {
ret = dma_irq;
goto exit_dma_irq_fail;
}
/* INT_DMA_LCD is handled in lcd_dma.c */
if (dma_irq == INT_DMA_LCD)
continue;
ret = request_irq(dma_irq,
omap1_dma_irq_handler, 0, "DMA",
(void *) (ch + 1));
if (ret != 0)
goto exit_dma_irq_fail;
}
/* reserve dma channels 0 and 1 in high security devices on 34xx */
@ -953,9 +851,6 @@ static int omap_system_dma_remove(struct platform_device *pdev)
{
int dma_irq, irq_rel = 0;
if (dma_omap2plus())
return 0;
for ( ; irq_rel < dma_chan_count; irq_rel++) {
dma_irq = platform_get_irq(pdev, irq_rel);
free_irq(dma_irq, (void *)(irq_rel + 1));

0
arch/arm/mach-omap1/include/mach/omap1510.h → arch/arm/mach-omap1/omap1510.h
View File

0
arch/arm/mach-omap1/include/mach/omap16xx.h → arch/arm/mach-omap1/omap16xx.h
View File

0
arch/arm/mach-omap1/include/mach/omap7xx.h → arch/arm/mach-omap1/omap7xx.h
View File

9
arch/arm/mach-omap1/pm.c
View File

@ -52,13 +52,14 @@
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include <linux/soc/ti/omap1-io.h>
#include "tc.h"
#include <linux/omap-dma.h>
#include <clocksource/timer-ti-dm.h>
#include <mach/irqs.h>
#include "hardware.h"
#include "mux.h"
#include "irqs.h"
#include "iomap.h"
#include "clock.h"
#include "pm.h"

2
arch/arm/mach-omap1/pm.h
View File

@ -34,6 +34,8 @@
#ifndef __ARCH_ARM_MACH_OMAP1_PM_H
#define __ARCH_ARM_MACH_OMAP1_PM_H
#include <linux/soc/ti/omap1-io.h>
/*
* ----------------------------------------------------------------------------
* Register and offset definitions to be used in PM assembler code

3
arch/arm/mach-omap1/reset.c
View File

@ -6,8 +6,7 @@
#include <linux/io.h>
#include <linux/reboot.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "iomap.h"
#include "common.h"

9
arch/arm/mach-omap1/serial.c
View File

@ -19,8 +19,9 @@
#include <asm/mach-types.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include "mux.h"
#include "pm.h"
#include "soc.h"
@ -141,7 +142,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
clk_enable(uart1_ck);
clk_prepare_enable(uart1_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000);
}
@ -151,7 +152,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
clk_enable(uart2_ck);
clk_prepare_enable(uart2_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 12000000);
else
@ -163,7 +164,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
clk_enable(uart3_ck);
clk_prepare_enable(uart3_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000);
}

2
arch/arm/mach-omap1/sleep.S
View File

@ -36,7 +36,7 @@
#include <asm/assembler.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "iomap.h"
#include "pm.h"

6
arch/arm/mach-omap1/soc.h
View File

@ -1,4 +1,6 @@
/*
* We can move mach/soc.h here once the drivers are fixed
* We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed
*/
#include <mach/soc.h>
#include "hardware.h"
#include "irqs.h"
#include <asm/irq.h>

91
arch/arm/mach-omap1/sram-init.c
View File

@ -14,6 +14,7 @@
#include <asm/fncpy.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/set_memory.h>
#include <asm/mach/map.h>
@ -22,18 +23,77 @@
#define OMAP1_SRAM_PA 0x20000000
#define SRAM_BOOTLOADER_SZ 0x80
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
static void __iomem *omap_sram_base;
static unsigned long omap_sram_start;
static unsigned long omap_sram_skip;
static unsigned long omap_sram_size;
static void __iomem *omap_sram_ceil;
/*
* Memory allocator for SRAM: calculates the new ceiling address
* for pushing a function using the fncpy API.
*
* Note that fncpy requires the returned address to be aligned
* to an 8-byte boundary.
*/
static void *omap_sram_push_address(unsigned long size)
{
unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
if (size > available) {
pr_err("Not enough space in SRAM\n");
return NULL;
}
new_ceil -= size;
new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
omap_sram_ceil = IOMEM(new_ceil);
return (void *)omap_sram_ceil;
}
void *omap_sram_push(void *funcp, unsigned long size)
{
void *sram;
unsigned long base;
int pages;
void *dst = NULL;
sram = omap_sram_push_address(size);
if (!sram)
return NULL;
base = (unsigned long)sram & PAGE_MASK;
pages = PAGE_ALIGN(size) / PAGE_SIZE;
set_memory_rw(base, pages);
dst = fncpy(sram, funcp, size);
set_memory_ro(base, pages);
set_memory_x(base, pages);
return dst;
}
/*
* The amount of SRAM depends on the core type.
* Note that we cannot try to test for SRAM here because writes
* to secure SRAM will hang the system. Also the SRAM is not
* yet mapped at this point.
* Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
*/
static void __init omap_detect_and_map_sram(void)
{
unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
unsigned long omap_sram_start = OMAP1_SRAM_PA;
unsigned long omap_sram_size;
unsigned long base;
int pages;
omap_sram_skip = SRAM_BOOTLOADER_SZ;
omap_sram_start = OMAP1_SRAM_PA;
if (cpu_is_omap7xx())
omap_sram_size = 0x32000; /* 200K */
@ -47,8 +107,27 @@ static void __init omap_detect_and_map_sram(void)
omap_sram_size = 0x4000;
}
omap_map_sram(omap_sram_start, omap_sram_size,
omap_sram_skip, 1);
omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, 1);
if (!omap_sram_base) {
pr_err("SRAM: Could not map\n");
return;
}
omap_sram_ceil = omap_sram_base + omap_sram_size;
/*
* Looks like we need to preserve some bootloader code at the
* beginning of SRAM for jumping to flash for reboot to work...
*/
memset_io(omap_sram_base + omap_sram_skip, 0,
omap_sram_size - omap_sram_skip);
base = (unsigned long)omap_sram_base;
pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
set_memory_ro(base, pages);
set_memory_x(base, pages);
}
static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
@ -62,7 +141,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
_omap_sram_reprogram_clock(dpllctl, ckctl);
}
int __init omap_sram_init(void)
int __init omap1_sram_init(void)
{
omap_detect_and_map_sram();
_omap_sram_reprogram_clock =

4
arch/arm/mach-omap1/sram.S
View File

@ -6,11 +6,11 @@
*/
#include <linux/linkage.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/assembler.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "iomap.h"
.text

4
arch/arm/mach-omap1/sram.h
View File

@ -1,8 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <plat/sram.h>
extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
int omap1_sram_init(void);
void *omap_sram_push(void *funcp, unsigned long size);
/* Do not use these */
extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap1_sram_reprogram_clock_sz;

2
arch/arm/mach-omap1/include/mach/tc.h → arch/arm/mach-omap1/tc.h
View File

@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/plat-omap/include/mach/tc.h
*
* OMAP Traffic Controller
*
* Copyright (C) 2004 Nokia Corporation

2
arch/arm/mach-omap1/time.c
View File

@ -47,10 +47,10 @@
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include "hardware.h"
#include "iomap.h"
#include "common.h"

1
arch/arm/mach-omap1/timer.c
View File

@ -26,6 +26,7 @@
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/platform_data/dmtimer-omap.h>
#include <linux/soc/ti/omap1-io.h>
#include <clocksource/timer-ti-dm.h>

100
arch/arm/mach-omap1/timer32k.c
View File

@ -45,15 +45,13 @@
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/io.h>
#include <linux/sched_clock.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <plat/counter-32k.h>
#include <mach/hardware.h>
#include "hardware.h"
#include "common.h"
/*
@ -159,6 +157,98 @@ static __init void omap_init_32k_timer(void)
OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe);
}
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30
/*
* 32KHz clocksource ... always available, on pretty most chips except
* OMAP 730 and 1510. Other timers could be used as clocksources, with
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
* but systems won't necessarily want to spend resources that way.
*/
static void __iomem *sync32k_cnt_reg;
static u64 notrace omap_32k_read_sched_clock(void)
{
return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
}
/**
* omap_read_persistent_clock64 - Return time from a persistent clock.
*
* Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into
* nsecs and adds to a monotonically increasing timespec64.
*/
static struct timespec64 persistent_ts;
static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift;
static void omap_read_persistent_clock64(struct timespec64 *ts)
{
unsigned long long nsecs;
cycles_t last_cycles;
last_cycles = cycles;
cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
nsecs = clocksource_cyc2ns(cycles - last_cycles,
persistent_mult, persistent_shift);
timespec64_add_ns(&persistent_ts, nsecs);
*ts = persistent_ts;
}
/**
* omap_init_clocksource_32k - setup and register counter 32k as a
* kernel clocksource
* @pbase: base addr of counter_32k module
* @size: size of counter_32k to map
*
* Returns 0 upon success or negative error code upon failure.
*
*/
int __init omap_init_clocksource_32k(void __iomem *vbase)
{
int ret;
/*
* 32k sync Counter IP register offsets vary between the
* highlander version and the legacy ones.
* The 'SCHEME' bits(30-31) of the revision register is used
* to identify the version.
*/
if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
OMAP2_32KSYNCNT_REV_SCHEME)
sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
else
sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
/*
* 120000 rough estimate from the calculations in
* __clocksource_update_freq_scale.
*/
clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
32768, NSEC_PER_SEC, 120000);
ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
250, 32, clocksource_mmio_readl_up);
if (ret) {
pr_err("32k_counter: can't register clocksource\n");
return ret;
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
register_persistent_clock(omap_read_persistent_clock64);
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
return 0;
}
/*
* ---------------------------------------------------------------------------
* Timer initialization
@ -180,7 +270,7 @@ int __init omap_32k_timer_init(void)
sync32k_ick = clk_get(NULL, "omap_32ksync_ick");
if (!IS_ERR(sync32k_ick))
clk_enable(sync32k_ick);
clk_prepare_enable(sync32k_ick);
ret = omap_init_clocksource_32k(base);
}

8
arch/arm/mach-omap1/usb.c
View File

@ -12,13 +12,13 @@
#include <linux/dma-map-ops.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/soc/ti/omap1-io.h>
#include <asm/irq.h>
#include <mach/mux.h>
#include <mach/usb.h>
#include "hardware.h"
#include "mux.h"
#include "usb.h"
#include "common.h"
/* These routines should handle the standard chip-specific modes

25
arch/arm/mach-omap1/usb.h Normal file
View File

@ -0,0 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* fixme correct answer depends on hmc_mode,
* as does (on omap1) any nonzero value for config->otg port number
*/
#include <linux/platform_data/usb-omap1.h>
#include <linux/soc/ti/omap1-usb.h>
#if IS_ENABLED(CONFIG_USB_OMAP)
#define is_usb0_device(config) 1
#else
#define is_usb0_device(config) 0
#endif
#if IS_ENABLED(CONFIG_USB_SUPPORT)
void omap1_usb_init(struct omap_usb_config *pdata);
#else
static inline void omap1_usb_init(struct omap_usb_config *pdata)
{
}
#endif
#define OMAP1_OHCI_BASE 0xfffba000
#define OMAP2_OHCI_BASE 0x4805e000
#define OMAP_OHCI_BASE OMAP1_OHCI_BASE

49
arch/arm/mach-omap2/Kconfig
View File

@ -123,6 +123,8 @@ config OMAP_INTERCONNECT_BARRIER
bool
select ARM_HEAVY_MB
config ARCH_OMAP
bool
if ARCH_OMAP2PLUS
@ -153,6 +155,53 @@ config SOC_HAS_REALTIME_COUNTER
depends on SOC_OMAP5 || SOC_DRA7XX
default y
config POWER_AVS_OMAP
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
select POWER_SUPPLY
help
Say Y to enable AVS(Adaptive Voltage Scaling)
support on OMAP containing the version 1 or
version 2 of the SmartReflex IP.
V1 is the 65nm version used in OMAP3430.
V2 is the update for the 45nm version of the IP used in OMAP3630
and OMAP4430
Please note, that by default SmartReflex is only
initialized and not enabled. To enable the automatic voltage
compensation for vdd mpu and vdd core from user space,
user must write 1 to
/debug/smartreflex/sr_<X>/autocomp,
where X is mpu_iva or core for OMAP3.
Optionally autocompensation can be enabled in the kernel
by default during system init via the enable_on_init flag
which an be passed as platform data to the smartreflex driver.
config POWER_AVS_OMAP_CLASS3
bool "Class 3 mode of Smartreflex Implementation"
depends on POWER_AVS_OMAP && TWL4030_CORE
help
Say Y to enable Class 3 implementation of Smartreflex
Class 3 implementation of Smartreflex employs continuous hardware
voltage calibration.
config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
depends on ARCH_OMAP3 && PM
help
Without this option, L2 Auxiliary control register contents are
lost during off-mode entry on HS/EMU devices. This feature
requires support from PPA / boot-loader in HS/EMU devices, which
currently does not exist by default.
config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
int "Service ID for the support routine to set L2 AUX control"
depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE
default 43
help
PPA routine service ID for setting L2 auxiliary control register.
comment "OMAP Core Type"
depends on ARCH_OMAP2

91
arch/arm/mach-omap2/sram.c
View File

@ -18,6 +18,7 @@
#include <asm/fncpy.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/set_memory.h>
#include <asm/mach/map.h>
@ -47,8 +48,68 @@
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
static unsigned long omap_sram_start;
static unsigned long omap_sram_skip;
static unsigned long omap_sram_size;
static void __iomem *omap_sram_base;
static unsigned long omap_sram_skip;
static void __iomem *omap_sram_ceil;
/*
* Memory allocator for SRAM: calculates the new ceiling address
* for pushing a function using the fncpy API.
*
* Note that fncpy requires the returned address to be aligned
* to an 8-byte boundary.
*/
static void *omap_sram_push_address(unsigned long size)
{
unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
if (size > available) {
pr_err("Not enough space in SRAM\n");
return NULL;
}
new_ceil -= size;
new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
omap_sram_ceil = IOMEM(new_ceil);
return (void *)omap_sram_ceil;
}
void *omap_sram_push(void *funcp, unsigned long size)
{
void *sram;
unsigned long base;
int pages;
void *dst = NULL;
sram = omap_sram_push_address(size);
if (!sram)
return NULL;
base = (unsigned long)sram & PAGE_MASK;
pages = PAGE_ALIGN(size) / PAGE_SIZE;
set_memory_rw(base, pages);
dst = fncpy(sram, funcp, size);
set_memory_ro(base, pages);
set_memory_x(base, pages);
return dst;
}
/*
* The SRAM context is lost during off-idle and stack
* needs to be reset.
*/
static void omap_sram_reset(void)
{
omap_sram_ceil = omap_sram_base + omap_sram_size;
}
/*
* Depending on the target RAMFS firewall setup, the public usable amount of
@ -119,6 +180,8 @@ static void __init omap_detect_sram(void)
*/
static void __init omap2_map_sram(void)
{
unsigned long base;
int pages;
int cached = 1;
if (cpu_is_omap34xx()) {
@ -132,8 +195,30 @@ static void __init omap2_map_sram(void)
cached = 0;
}
omap_map_sram(omap_sram_start, omap_sram_size,
omap_sram_skip, cached);
if (omap_sram_size == 0)
return;
omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, cached);
if (!omap_sram_base) {
pr_err("SRAM: Could not map\n");
return;
}
omap_sram_reset();
/*
* Looks like we need to preserve some bootloader code at the
* beginning of SRAM for jumping to flash for reboot to work...
*/
memset_io(omap_sram_base + omap_sram_skip, 0,
omap_sram_size - omap_sram_skip);
base = (unsigned long)omap_sram_base;
pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
set_memory_ro(base, pages);
set_memory_x(base, pages);
}
static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,

5
arch/arm/mach-omap2/sram.h
View File

@ -4,7 +4,6 @@
*/
#ifndef __ASSEMBLY__
#include <plat/sram.h>
extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
@ -14,6 +13,10 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
extern void omap3_sram_restore_context(void);
extern int __init omap_sram_init(void);
extern void *omap_sram_push(void *funcp, unsigned long size);
/* Do not use these */
extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap24xx_sram_reprogram_clock_sz;

119
arch/arm/plat-omap/Kconfig
View File

@ -1,119 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config ARCH_OMAP
bool
if ARCH_OMAP
menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
comment "OMAP Feature Selections"
config OMAP_DEBUG_DEVICES
bool
help
For debug cards on TI reference boards.
config OMAP_DEBUG_LEDS
def_bool y if NEW_LEDS
depends on OMAP_DEBUG_DEVICES
select LEDS_CLASS
config POWER_AVS_OMAP
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
select POWER_SUPPLY
help
Say Y to enable AVS(Adaptive Voltage Scaling)
support on OMAP containing the version 1 or
version 2 of the SmartReflex IP.
V1 is the 65nm version used in OMAP3430.
V2 is the update for the 45nm version of the IP used in OMAP3630
and OMAP4430
Please note, that by default SmartReflex is only
initialized and not enabled. To enable the automatic voltage
compensation for vdd mpu and vdd core from user space,
user must write 1 to
/debug/smartreflex/sr_<X>/autocomp,
where X is mpu_iva or core for OMAP3.
Optionally autocompensation can be enabled in the kernel
by default during system init via the enable_on_init flag
which an be passed as platform data to the smartreflex driver.
config POWER_AVS_OMAP_CLASS3
bool "Class 3 mode of Smartreflex Implementation"
depends on POWER_AVS_OMAP && TWL4030_CORE
help
Say Y to enable Class 3 implementation of Smartreflex
Class 3 implementation of Smartreflex employs continuous hardware
voltage calibration.
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
help
Say Y if you want to reset unused clocks during boot.
This option saves power, but assumes all drivers are
using the clock framework. Broken drivers that do not
yet use clock framework may not work with this option.
If you are booting from another operating system, you
probably do not want this option enabled until your
device drivers work properly.
config OMAP_MPU_TIMER
bool "Use mpu timer"
depends on ARCH_OMAP1
help
Select this option if you want to use the OMAP mpu timer. This
timer provides more intra-tick resolution than the 32KHz timer,
but consumes more power.
config OMAP_32K_TIMER
bool "Use 32KHz timer"
depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX.
On OMAP2PLUS this value is only used for CONFIG_HZ and
CLOCK_TICK_RATE compile time calculation.
The actual timer selection is done in the board file
through the (DT_)MACHINE_START structure.
config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
depends on ARCH_OMAP3 && PM
help
Without this option, L2 Auxiliary control register contents are
lost during off-mode entry on HS/EMU devices. This feature
requires support from PPA / boot-loader in HS/EMU devices, which
currently does not exist by default.
config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
int "Service ID for the support routine to set L2 AUX control"
depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE
default 43
help
PPA routine service ID for setting L2 auxiliary control register.
config OMAP_SERIAL_WAKE
bool "Enable wake-up events for serial ports"
depends on ARCH_OMAP1 && OMAP_MUX
default y
help
Select this option if you want to have your system wake up
to data on the serial RX line. This allows you to wake the
system from serial console.
endmenu
endif

13
arch/arm/plat-omap/Makefile
View File

@ -1,13 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for the linux kernel.
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include
# Common support
obj-y := sram.o dma.o counter_32k.o
# omap_device support (OMAP2+ only at the moment)
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o

114
arch/arm/plat-omap/counter_32k.c
View File

@ -1,114 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* OMAP 32ksynctimer/counter_32k-related code
*
* Copyright (C) 2009 Texas Instruments
* Copyright (C) 2010 Nokia Corporation
* Tony Lindgren <tony@atomide.com>
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clocksource.h>
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
#include <plat/counter-32k.h>
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30
/*
* 32KHz clocksource ... always available, on pretty most chips except
* OMAP 730 and 1510. Other timers could be used as clocksources, with
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
* but systems won't necessarily want to spend resources that way.
*/
static void __iomem *sync32k_cnt_reg;
static u64 notrace omap_32k_read_sched_clock(void)
{
return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
}
/**
* omap_read_persistent_clock64 - Return time from a persistent clock.
*
* Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into
* nsecs and adds to a monotonically increasing timespec64.
*/
static struct timespec64 persistent_ts;
static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift;
static void omap_read_persistent_clock64(struct timespec64 *ts)
{
unsigned long long nsecs;
cycles_t last_cycles;
last_cycles = cycles;
cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
nsecs = clocksource_cyc2ns(cycles - last_cycles,
persistent_mult, persistent_shift);
timespec64_add_ns(&persistent_ts, nsecs);
*ts = persistent_ts;
}
/**
* omap_init_clocksource_32k - setup and register counter 32k as a
* kernel clocksource
* @pbase: base addr of counter_32k module
* @size: size of counter_32k to map
*
* Returns 0 upon success or negative error code upon failure.
*
*/
int __init omap_init_clocksource_32k(void __iomem *vbase)
{
int ret;
/*
* 32k sync Counter IP register offsets vary between the
* highlander version and the legacy ones.
* The 'SCHEME' bits(30-31) of the revision register is used
* to identify the version.
*/
if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
OMAP2_32KSYNCNT_REV_SCHEME)
sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
else
sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
/*
* 120000 rough estimate from the calculations in
* __clocksource_update_freq_scale.
*/
clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
32768, NSEC_PER_SEC, 120000);
ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
250, 32, clocksource_mmio_readl_up);
if (ret) {
pr_err("32k_counter: can't register clocksource\n");
return ret;
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
register_persistent_clock(omap_read_persistent_clock64);
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
return 0;
}

171
arch/arm/plat-omap/debug-leds.c
View File

@ -1,171 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/plat-omap/debug-leds.c
*
* Copyright 2011 by Bryan Wu <bryan.wu@canonical.com>
* Copyright 2003 by Texas Instruments Incorporated
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/slab.h>
#include <asm/mach-types.h>
/* Many OMAP development platforms reuse the same "debug board"; these
* platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
* debug board (all green), accessed through FPGA registers.
*/
/* NOTE: most boards don't have a static mapping for the FPGA ... */
struct h2p2_dbg_fpga {
/* offset 0x00 */
u16 smc91x[8];
/* offset 0x10 */
u16 fpga_rev;
u16 board_rev;
u16 gpio_outputs;
u16 leds;
/* offset 0x18 */
u16 misc_inputs;
u16 lan_status;
u16 lan_reset;
u16 reserved0;
/* offset 0x20 */
u16 ps2_data;
u16 ps2_ctrl;
/* plus also 4 rs232 ports ... */
};
static struct h2p2_dbg_fpga __iomem *fpga;
static u16 fpga_led_state;
struct dbg_led {
struct led_classdev cdev;
u16 mask;
};
static const struct {
const char *name;
const char *trigger;
} dbg_leds[] = {
{ "dbg:d4", "heartbeat", },
{ "dbg:d5", "cpu0", },
{ "dbg:d6", "default-on", },
{ "dbg:d7", },
{ "dbg:d8", },
{ "dbg:d9", },
{ "dbg:d10", },
{ "dbg:d11", },
{ "dbg:d12", },
{ "dbg:d13", },
{ "dbg:d14", },
{ "dbg:d15", },
{ "dbg:d16", },
{ "dbg:d17", },
{ "dbg:d18", },
{ "dbg:d19", },
};
/*
* The triggers lines up below will only be used if the
* LED triggers are compiled in.
*/
static void dbg_led_set(struct led_classdev *cdev,
enum led_brightness b)
{
struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
u16 reg;
reg = readw_relaxed(&fpga->leds);
if (b != LED_OFF)
reg |= led->mask;
else
reg &= ~led->mask;
writew_relaxed(reg, &fpga->leds);
}
static enum led_brightness dbg_led_get(struct led_classdev *cdev)
{
struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
u16 reg;
reg = readw_relaxed(&fpga->leds);
return (reg & led->mask) ? LED_FULL : LED_OFF;
}
static int fpga_probe(struct platform_device *pdev)
{
struct resource *iomem;
int i;
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!iomem)
return -ENODEV;
fpga = ioremap(iomem->start, resource_size(iomem));
writew_relaxed(0xff, &fpga->leds);
for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
struct dbg_led *led;
led = kzalloc(sizeof(*led), GFP_KERNEL);
if (!led)
break;
led->cdev.name = dbg_leds[i].name;
led->cdev.brightness_set = dbg_led_set;
led->cdev.brightness_get = dbg_led_get;
led->cdev.default_trigger = dbg_leds[i].trigger;
led->mask = BIT(i);
if (led_classdev_register(NULL, &led->cdev) < 0) {
kfree(led);
break;
}
}
return 0;
}
static int fpga_suspend_noirq(struct device *dev)
{
fpga_led_state = readw_relaxed(&fpga->leds);
writew_relaxed(0xff, &fpga->leds);
return 0;
}
static int fpga_resume_noirq(struct device *dev)
{
writew_relaxed(~fpga_led_state, &fpga->leds);
return 0;
}
static const struct dev_pm_ops fpga_dev_pm_ops = {
.suspend_noirq = fpga_suspend_noirq,
.resume_noirq = fpga_resume_noirq,
};
static struct platform_driver led_driver = {
.driver.name = "omap_dbg_led",
.driver.pm = &fpga_dev_pm_ops,
.probe = fpga_probe,
};
static int __init fpga_init(void)
{
if (machine_is_omap_h4()
|| machine_is_omap_h3()
|| machine_is_omap_h2()
|| machine_is_omap_perseus2()
)
return platform_driver_register(&led_driver);
return 0;
}
fs_initcall(fpga_init);

1
arch/arm/plat-omap/include/plat/counter-32k.h
View File

@ -1 +0,0 @@
int omap_init_clocksource_32k(void __iomem *vbase);

21
arch/arm/plat-omap/include/plat/cpu.h
View File

@ -1,21 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* OMAP cpu type detection
*
* Copyright (C) 2004, 2008 Nokia Corporation
*
* Copyright (C) 2009-11 Texas Instruments.
*
* Written by Tony Lindgren <tony.lindgren@nokia.com>
*
* Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
*/
#ifndef __ASM_ARCH_OMAP_CPU_H
#define __ASM_ARCH_OMAP_CPU_H
#ifdef CONFIG_ARCH_OMAP1
#include <mach/soc.h>
#endif
#endif

8
arch/arm/plat-omap/include/plat/sram.h
View File

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
int omap_sram_init(void);
void omap_map_sram(unsigned long start, unsigned long size,
unsigned long skip, int cached);
void omap_sram_reset(void);
extern void *omap_sram_push(void *funcp, unsigned long size);

129
arch/arm/plat-omap/sram.c
View File

@ -1,129 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/plat-omap/sram.c
*
* OMAP SRAM detection and management
*
* Copyright (C) 2005 Nokia Corporation
* Written by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009-2012 Texas Instruments
* Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*/
#undef DEBUG
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/fncpy.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/set_memory.h>
#include <asm/mach/map.h>
#include <plat/sram.h>
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
static void __iomem *omap_sram_base;
static unsigned long omap_sram_skip;
static unsigned long omap_sram_size;
static void __iomem *omap_sram_ceil;
/*
* Memory allocator for SRAM: calculates the new ceiling address
* for pushing a function using the fncpy API.
*
* Note that fncpy requires the returned address to be aligned
* to an 8-byte boundary.
*/
static void *omap_sram_push_address(unsigned long size)
{
unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
if (size > available) {
pr_err("Not enough space in SRAM\n");
return NULL;
}
new_ceil -= size;
new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
omap_sram_ceil = IOMEM(new_ceil);
return (void *)omap_sram_ceil;
}
void *omap_sram_push(void *funcp, unsigned long size)
{
void *sram;
unsigned long base;
int pages;
void *dst = NULL;
sram = omap_sram_push_address(size);
if (!sram)
return NULL;
base = (unsigned long)sram & PAGE_MASK;
pages = PAGE_ALIGN(size) / PAGE_SIZE;
set_memory_rw(base, pages);
dst = fncpy(sram, funcp, size);
set_memory_ro(base, pages);
set_memory_x(base, pages);
return dst;
}
/*
* The SRAM context is lost during off-idle and stack
* needs to be reset.
*/
void omap_sram_reset(void)
{
omap_sram_ceil = omap_sram_base + omap_sram_size;
}
/*
* Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
*/
void __init omap_map_sram(unsigned long start, unsigned long size,
unsigned long skip, int cached)
{
unsigned long base;
int pages;
if (size == 0)
return;
start = ROUND_DOWN(start, PAGE_SIZE);
omap_sram_size = size;
omap_sram_skip = skip;
omap_sram_base = __arm_ioremap_exec(start, size, cached);
if (!omap_sram_base) {
pr_err("SRAM: Could not map\n");
return;
}
omap_sram_reset();
/*
* Looks like we need to preserve some bootloader code at the
* beginning of SRAM for jumping to flash for reboot to work...
*/
memset_io(omap_sram_base + omap_sram_skip, 0,
omap_sram_size - omap_sram_skip);
base = (unsigned long)omap_sram_base;
pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
set_memory_ro(base, pages);
set_memory_x(base, pages);
}

2
drivers/clocksource/timer-ti-dm.c
View File

@ -433,7 +433,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
}
#if defined(CONFIG_ARCH_OMAP1)
#include <mach/hardware.h>
#include <linux/soc/ti/omap1-io.h>
static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{

19
drivers/dma/ti/omap-dma.c
View File

@ -699,6 +699,11 @@ static void omap_dma_put_lch(struct omap_dmadev *od, int lch)
mutex_unlock(&od->lch_lock);
}
static inline bool omap_dma_legacy(struct omap_dmadev *od)
{
return IS_ENABLED(CONFIG_ARCH_OMAP1) && od->legacy;
}
static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
{
struct omap_dmadev *od = to_omap_dma_dev(chan->device);
@ -706,7 +711,7 @@ static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
struct device *dev = od->ddev.dev;
int ret;
if (od->legacy) {
if (omap_dma_legacy(od)) {
ret = omap_request_dma(c->dma_sig, "DMA engine",
omap_dma_callback, c, &c->dma_ch);
} else {
@ -718,7 +723,7 @@ static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
if (ret >= 0) {
omap_dma_assign(od, c, c->dma_ch);
if (!od->legacy) {
if (!omap_dma_legacy(od)) {
unsigned val;
spin_lock_irq(&od->irq_lock);
@ -757,7 +762,7 @@ static void omap_dma_free_chan_resources(struct dma_chan *chan)
struct omap_dmadev *od = to_omap_dma_dev(chan->device);
struct omap_chan *c = to_omap_dma_chan(chan);
if (!od->legacy) {
if (!omap_dma_legacy(od)) {
spin_lock_irq(&od->irq_lock);
od->irq_enable_mask &= ~BIT(c->dma_ch);
omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);
@ -768,7 +773,7 @@ static void omap_dma_free_chan_resources(struct dma_chan *chan)
od->lch_map[c->dma_ch] = NULL;
vchan_free_chan_resources(&c->vc);
if (od->legacy)
if (omap_dma_legacy(od))
omap_free_dma(c->dma_ch);
else
omap_dma_put_lch(od, c->dma_ch);
@ -1674,12 +1679,14 @@ static int omap_dma_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "omap_system_dma_plat_info is missing");
return -ENODEV;
}
} else {
} else if (IS_ENABLED(CONFIG_ARCH_OMAP1)) {
od->cfg = &default_cfg;
od->plat = omap_get_plat_info();
if (!od->plat)
return -EPROBE_DEFER;
} else {
return -ENODEV;
}
od->reg_map = od->plat->reg_map;
@ -1855,7 +1862,7 @@ static int omap_dma_remove(struct platform_device *pdev)
dma_async_device_unregister(&od->ddev);
if (!od->legacy) {
if (!omap_dma_legacy(od)) {
/* Disable all interrupts */
omap_dma_glbl_write(od, IRQENABLE_L0, 0);
}

1
drivers/input/keyboard/omap-keypad.c
View File

@ -24,6 +24,7 @@
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/keypad-omap.h>
#include <linux/soc/ti/omap1-io.h>
#undef NEW_BOARD_LEARNING_MODE

3
drivers/pcmcia/Kconfig
View File

@ -246,7 +246,8 @@ config PCMCIA_VRC4171
config OMAP_CF
tristate "OMAP CompactFlash Controller"
depends on PCMCIA && ARCH_OMAP16XX
depends on PCMCIA
depends on ARCH_OMAP16XX || (ARM && COMPILE_TEST)
help
Say Y here to support the CompactFlash controller on OMAP.
Note that this doesn't support "True IDE" mode.

48
drivers/pcmcia/omap_cf.c
View File

@ -16,13 +16,12 @@
#include <pcmcia/ss.h>
#include <mach/hardware.h>
#include <asm/io.h>
#include <linux/sizes.h>
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/soc/ti/omap1-io.h>
#include <linux/soc/ti/omap1-soc.h>
#include <linux/soc/ti/omap1-mux.h>
/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
* hard-wired timings to support Compact Flash memory cards; they won't work
@ -205,6 +204,8 @@ static int __init omap_cf_probe(struct platform_device *pdev)
struct omap_cf_socket *cf;
int irq;
int status;
struct resource *res;
struct resource iospace = DEFINE_RES_IO(SZ_64, SZ_4K);
seg = (int) pdev->dev.platform_data;
if (seg == 0 || seg > 3)
@ -215,6 +216,8 @@ static int __init omap_cf_probe(struct platform_device *pdev)
if (irq < 0)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
cf = kzalloc(sizeof *cf, GFP_KERNEL);
if (!cf)
return -ENOMEM;
@ -230,29 +233,12 @@ static int __init omap_cf_probe(struct platform_device *pdev)
goto fail0;
cf->irq = irq;
cf->socket.pci_irq = irq;
switch (seg) {
/* NOTE: CS0 could be configured too ... */
case 1:
cf->phys_cf = OMAP_CS1_PHYS;
break;
case 2:
cf->phys_cf = OMAP_CS2_PHYS;
break;
case 3:
cf->phys_cf = omap_cs3_phys();
break;
default:
goto fail1;
}
cf->iomem.start = cf->phys_cf;
cf->iomem.end = cf->iomem.end + SZ_8K - 1;
cf->iomem.flags = IORESOURCE_MEM;
cf->phys_cf = res->start;
/* pcmcia layer only remaps "real" memory */
cf->socket.io_offset = (unsigned long)
ioremap(cf->phys_cf + SZ_4K, SZ_2K);
if (!cf->socket.io_offset) {
cf->socket.io_offset = iospace.start;
status = pci_remap_iospace(&iospace, cf->phys_cf + SZ_4K);
if (status) {
status = -ENOMEM;
goto fail1;
}
@ -273,15 +259,6 @@ static int __init omap_cf_probe(struct platform_device *pdev)
pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
/* NOTE: better EMIFS setup might support more cards; but the
* TRM only shows how to affect regular flash signals, not their
* CF/PCMCIA variants...
*/
pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
/* CF uses armxor_ck, which is "always" available */
pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
@ -309,8 +286,6 @@ static int __init omap_cf_probe(struct platform_device *pdev)
fail2:
release_mem_region(cf->phys_cf, SZ_8K);
fail1:
if (cf->socket.io_offset)
iounmap((void __iomem *) cf->socket.io_offset);
free_irq(irq, cf);
fail0:
kfree(cf);
@ -324,7 +299,6 @@ static int __exit omap_cf_remove(struct platform_device *pdev)
cf->active = 0;
pcmcia_unregister_socket(&cf->socket);
del_timer_sync(&cf->timer);
iounmap((void __iomem *) cf->socket.io_offset);
release_mem_region(cf->phys_cf, SZ_8K);
free_irq(cf->irq, cf);
kfree(cf);

2
drivers/spi/Kconfig
View File

@ -631,7 +631,7 @@ config SPI_OCTEON
config SPI_OMAP_UWIRE
tristate "OMAP1 MicroWire"
depends on ARCH_OMAP1
depends on ARCH_OMAP1 || (ARM && COMPILE_TEST)
select SPI_BITBANG
help
This hooks up to the MicroWire controller on OMAP1 chips.

15
drivers/spi/spi-omap-uwire.c
View File

@ -44,13 +44,10 @@
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/mux.h>
#include <mach/omap7xx.h> /* OMAP7XX_IO_CONF registers */
#include <linux/soc/ti/omap1-io.h>
#include <linux/soc/ti/omap1-soc.h>
#include <linux/soc/ti/omap1-mux.h>
/* FIXME address is now a platform device resource,
* and irqs should show there too...
@ -548,12 +545,6 @@ static int __init omap_uwire_init(void)
omap_cfg_reg(N14_1610_UWIRE_CS0);
omap_cfg_reg(N15_1610_UWIRE_CS1);
}
if (machine_is_omap_perseus2()) {
/* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000;
omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9);
}
return platform_driver_register(&uwire_driver);
}

1
drivers/tty/serial/8250/8250.h
View File

@ -259,6 +259,7 @@ static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
#endif
#ifdef CONFIG_ARCH_OMAP1
#include <linux/soc/ti/omap1-soc.h>
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
int res;

5
drivers/usb/gadget/udc/omap_udc.c
View File

@ -40,8 +40,11 @@
#include <asm/mach-types.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/usb-omap1.h>
#include <mach/usb.h>
#include <linux/soc/ti/omap1-usb.h>
#include <linux/soc/ti/omap1-soc.h>
#include <linux/soc/ti/omap1-io.h>
#include "omap_udc.h"

2
drivers/usb/host/Kconfig
View File

@ -214,7 +214,7 @@ config USB_EHCI_HCD_NPCM7XX
config USB_EHCI_HCD_OMAP
tristate "EHCI support for OMAP3 and later chips"
depends on ARCH_OMAP
depends on ARCH_OMAP || COMPILE_TEST
depends on NOP_USB_XCEIV
default y
help

42
drivers/usb/host/ohci-omap.c
View File

@ -25,6 +25,11 @@
#include <linux/module.h>
#include <linux/usb/otg.h>
#include <linux/platform_device.h>
#include <linux/platform_data/usb-omap1.h>
#include <linux/soc/ti/omap1-usb.h>
#include <linux/soc/ti/omap1-mux.h>
#include <linux/soc/ti/omap1-soc.h>
#include <linux/soc/ti/omap1-io.h>
#include <linux/signal.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
@ -34,12 +39,6 @@
#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/mux.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#define DRIVER_DESC "OHCI OMAP driver"
struct ohci_omap_priv {
@ -68,31 +67,6 @@ static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on)
}
}
/*
* Board specific gang-switched transceiver power on/off.
* NOTE: OSK supplies power from DC, not battery.
*/
static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on)
{
if (on) {
if (machine_is_omap_innovator() && cpu_is_omap1510())
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
INNOVATOR_FPGA_CAM_USB_CONTROL);
else if (priv->power)
gpiod_set_value_cansleep(priv->power, 0);
} else {
if (machine_is_omap_innovator() && cpu_is_omap1510())
__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
INNOVATOR_FPGA_CAM_USB_CONTROL);
else if (priv->power)
gpiod_set_value_cansleep(priv->power, 1);
}
return 0;
}
#ifdef CONFIG_USB_OTG
static void start_hnp(struct ohci_hcd *ohci)
@ -203,7 +177,11 @@ static int ohci_omap_reset(struct usb_hcd *hcd)
}
/* FIXME hub_wq hub requests should manage power switching */
omap_ohci_transceiver_power(priv, 1);
if (config->transceiver_power)
return config->transceiver_power(1);
if (priv->power)
gpiod_set_value_cansleep(priv->power, 0);
/* board init will have already handled HMC and mux setup.
* any external transceiver should already be initialized

3
drivers/usb/phy/Kconfig
View File

@ -30,7 +30,8 @@ config FSL_USB2_OTG
config ISP1301_OMAP
tristate "Philips ISP1301 with OMAP OTG"
depends on I2C && ARCH_OMAP_OTG
depends on I2C
depends on ARCH_OMAP_OTG || (ARM && COMPILE_TEST)
depends on USB
depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't be 'y'
select USB_PHY

6
drivers/usb/phy/phy-isp1301-omap.c
View File

@ -23,9 +23,9 @@
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <mach/mux.h>
#include <mach/usb.h>
#include <linux/soc/ti/omap1-mux.h>
#include <linux/soc/ti/omap1-usb.h>
#include <linux/soc/ti/omap1-io.h>
#undef VERBOSE

4
drivers/video/backlight/Kconfig
View File

@ -211,8 +211,8 @@ config BACKLIGHT_LOCOMO
config BACKLIGHT_OMAP1
tristate "OMAP1 PWL-based LCD Backlight"
depends on ARCH_OMAP1
default y
depends on ARCH_OMAP1 || COMPILE_TEST
default ARCH_OMAP1
help
This driver controls the LCD backlight level and power for
the PWL module of OMAP1 processors. Say Y if your board

4
drivers/video/backlight/omap1_bl.c
View File

@ -14,8 +14,8 @@
#include <linux/slab.h>
#include <linux/platform_data/omap1_bl.h>
#include <mach/hardware.h>
#include <mach/mux.h>
#include <linux/soc/ti/omap1-io.h>
#include <linux/soc/ti/omap1-mux.h>
#define OMAPBL_MAX_INTENSITY 0xff

2
drivers/video/fbdev/Makefile
View File

@ -110,7 +110,7 @@ obj-$(CONFIG_FB_UDL) += udlfb.o
obj-$(CONFIG_FB_SMSCUFX) += smscufx.o
obj-$(CONFIG_FB_XILINX) += xilinxfb.o
obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
obj-$(CONFIG_FB_OMAP) += omap/
obj-y += omap/
obj-y += omap2/
obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
obj-$(CONFIG_FB_CARMINE) += carminefb.o

4
drivers/video/fbdev/omap/Kconfig
View File

@ -2,7 +2,7 @@
config FB_OMAP
tristate "OMAP frame buffer support"
depends on FB
depends on ARCH_OMAP1
depends on ARCH_OMAP1 || (ARM && COMPILE_TEST)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
@ -42,7 +42,7 @@ config FB_OMAP_LCD_MIPID
config FB_OMAP_LCD_H3
bool "TPS65010 LCD controller on OMAP-H3"
depends on MACH_OMAP_H3
depends on MACH_OMAP_H3 || COMPILE_TEST
depends on TPS65010=y
default y
help

5
drivers/video/fbdev/omap/Makefile
View File

@ -5,6 +5,11 @@
obj-$(CONFIG_FB_OMAP) += omapfb.o
ifdef CONFIG_FB_OMAP
# must be built-in
obj-y += lcd_dma.o
endif
objs-yy := omapfb_main.o lcdc.o
objs-y$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o

6
drivers/video/fbdev/omap/lcd_ams_delta.c
View File

@ -14,7 +14,7 @@
#include <linux/gpio/consumer.h>
#include <linux/lcd.h>
#include <mach/hardware.h>
#include <linux/soc/ti/omap1-io.h>
#include "omapfb.h"
@ -128,7 +128,6 @@ static struct lcd_panel ams_delta_panel = {
static int ams_delta_panel_probe(struct platform_device *pdev)
{
struct lcd_device *lcd_device = NULL;
int ret;
gpiod_vblen = devm_gpiod_get(&pdev->dev, "vblen", GPIOD_OUT_LOW);
if (IS_ERR(gpiod_vblen))
@ -145,7 +144,8 @@ static int ams_delta_panel_probe(struct platform_device *pdev)
&ams_delta_lcd_ops);
if (IS_ERR(lcd_device)) {
ret = PTR_ERR(lcd_device);
int ret = PTR_ERR(lcd_device);
dev_err(&pdev->dev, "failed to register device\n");
return ret;
}

7
arch/arm/mach-omap1/lcd_dma.c → drivers/video/fbdev/omap/lcd_dma.c
View File

@ -25,8 +25,11 @@
#include <linux/omap-dma.h>
#include <mach/hardware.h>
#include <mach/lcdc.h>
#include <linux/soc/ti/omap1-soc.h>
#include <linux/soc/ti/omap1-io.h>
#include "lcdc.h"
#include "lcd_dma.h"
int omap_lcd_dma_running(void)
{

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