rt2800: 5592: RF early registers initialization
Based on: NICInitRT5592RFRegisters() RF5592Reg_2G_5G[] from: DPO_RT5572_LinuxSTA_2.6.1.3_20121022/chips/rt5592.c This patch also merge common frequency adjustment (RF_R17 settings) code. Further work is needed, to setup more RF/BBP/MAC registers after that. Signed-off-by: Stanislaw Gruszka <stf_xl@wp.pl> Tested-by: Wanlong Gao <gaowanlong@cn.fujitsu.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1991,6 +1991,18 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev,
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#define POWER_BOUND_5G 0x2b
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#define POWER_BOUND_5G 0x2b
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#define FREQ_OFFSET_BOUND 0x5f
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#define FREQ_OFFSET_BOUND 0x5f
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static void rt2800_adjust_freq_offset(struct rt2x00_dev *rt2x00dev)
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{
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u8 rfcsr;
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rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
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else
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
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rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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}
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static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev,
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static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev,
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struct ieee80211_conf *conf,
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struct ieee80211_conf *conf,
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struct rf_channel *rf,
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struct rf_channel *rf,
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@ -2011,12 +2023,7 @@ static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
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rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
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rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
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rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
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rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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rt2800_adjust_freq_offset(rt2x00dev);
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if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
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else
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
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rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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if (rf->channel <= 14) {
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if (rf->channel <= 14) {
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if (rf->channel == 6)
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if (rf->channel == 6)
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@ -2057,13 +2064,7 @@ static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev,
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else
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else
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rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
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rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
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rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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rt2800_adjust_freq_offset(rt2x00dev);
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if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
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else
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
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rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
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rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
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rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
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rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
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@ -2128,12 +2129,7 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
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rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
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rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
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rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
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rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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rt2800_adjust_freq_offset(rt2x00dev);
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if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
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else
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
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rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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if (rf->channel <= 14) {
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if (rf->channel <= 14) {
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int idx = rf->channel-1;
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int idx = rf->channel-1;
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@ -2423,12 +2419,7 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev,
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}
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}
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/* TODO proper frequency adjustment */
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/* TODO proper frequency adjustment */
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rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
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rt2800_adjust_freq_offset(rt2x00dev);
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if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
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else
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rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
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rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
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/* TODO merge with others */
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/* TODO merge with others */
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rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
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rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
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@ -4638,6 +4629,37 @@ static void rt2800_init_rfcsr_5392(struct rt2x00_dev *rt2x00dev)
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rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
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rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
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}
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}
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static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
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{
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rt2800_rfcsr_write(rt2x00dev, 1, 0x3F);
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rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
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rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
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rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
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rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
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rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
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rt2800_rfcsr_write(rt2x00dev, 19, 0x4D);
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rt2800_rfcsr_write(rt2x00dev, 20, 0x10);
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rt2800_rfcsr_write(rt2x00dev, 21, 0x8D);
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rt2800_rfcsr_write(rt2x00dev, 26, 0x82);
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rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 29, 0x10);
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rt2800_rfcsr_write(rt2x00dev, 33, 0xC0);
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rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
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rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
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rt2800_rfcsr_write(rt2x00dev, 47, 0x0C);
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rt2800_rfcsr_write(rt2x00dev, 53, 0x22);
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rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
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rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
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msleep(1);
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rt2800_adjust_freq_offset(rt2x00dev);
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}
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static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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{
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{
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struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
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struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
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@ -4655,6 +4677,7 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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!rt2x00_rt(rt2x00dev, RT3572) &&
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!rt2x00_rt(rt2x00dev, RT3572) &&
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!rt2x00_rt(rt2x00dev, RT5390) &&
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!rt2x00_rt(rt2x00dev, RT5390) &&
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!rt2x00_rt(rt2x00dev, RT5392) &&
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!rt2x00_rt(rt2x00dev, RT5392) &&
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!rt2x00_rt(rt2x00dev, RT5392) &&
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!rt2800_is_305x_soc(rt2x00dev))
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!rt2800_is_305x_soc(rt2x00dev))
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return 0;
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return 0;
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@ -4709,6 +4732,9 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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case RT5392:
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case RT5392:
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rt2800_init_rfcsr_5392(rt2x00dev);
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rt2800_init_rfcsr_5392(rt2x00dev);
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break;
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break;
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case RT5592:
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rt2800_init_rfcsr_5592(rt2x00dev);
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break;
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}
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}
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if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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