i.MX DT bindings update for 5.4
- Add SoC bindings for i.MX8MN. - Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc. - Add vendor prefix for Anvo-Systems and Einfochips. - Update LPUART bindings for i.MX8QXP clock requirement. - Update imx-weim bindings for optional burst clock mode support. - Update EEPROM bindings for Anvo ANV32E61W device support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJdYoXSAAoJEFBXWFqHsHzOOJgIAI65c6zkORxJIJ/gwJ++TlPR X/f8CUFPbe2kozNnFlk/usoevjt2jKEeeIJh//60BW8/N8NhE6aaorxnbnrat8EJ QkuHg5s+cXMhu2SkuMaPj/ggJk8LSPKYCOoMiDNHMyneFLvcI3+peowOAdd+xRH1 +rAM23JIdnvDnY16pEss1zfdOlbhLO08N0xbsh41bt8oG1GQLeM2dZycy3nFhBqf +cQiiOMPnpmzFkZ3cR3Mp4fgIk/bvDbT+CwH4O/eACysBTolc3y4ISF2lKbAbQU0 qOHpBAKJIL5w73ojBuMMdE5WLwprQjT/MOfTlbu/H9s1XBXW985lW4ktgYOyTdU= =KR0R -----END PGP SIGNATURE----- Merge tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings update for 5.4 - Add SoC bindings for i.MX8MN. - Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc. - Add vendor prefix for Anvo-Systems and Einfochips. - Update LPUART bindings for i.MX8QXP clock requirement. - Update imx-weim bindings for optional burst clock mode support. - Update EEPROM bindings for Anvo ANV32E61W device support. * tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles dt-bindings: eeprom: at25: Add Anvo ANV32E61W dt-bindings: vendor-prefixes: Add Anvo-Systems dt-bindings: arm: fsl: add Hummingboard Pulse dt-bindings: arm: imx: add imx8mq nitrogen support dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string dt-bindings: arm: imx: Add the soc binding for i.MX8MN dt-bindings: bus: imx-weim: document optional burst clock mode dt-bindings: arm: fsl: Add the pico-pi-imx8m board dt-bindings: arm: Document i.MX8QXP AI_ML board binding dt-bindings: Add Vendor prefix for Einfochips dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board dt-bindings: serial: lpuart: add the clock requirement for imx8qxp dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board Link: https://lore.kernel.org/r/20190825153237.28829-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -161,6 +161,20 @@ properties:
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items:
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- enum:
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- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
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- kontron,imx6ul-n6310-som # Kontron N6310 SOM
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- const: fsl,imx6ul
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- description: Kontron N6310 S Board
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items:
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- const: kontron,imx6ul-n6310-s
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- const: kontron,imx6ul-n6310-som
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- const: fsl,imx6ul
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- description: Kontron N6310 S 43 Board
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items:
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- const: kontron,imx6ul-n6310-s-43
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- const: kontron,imx6ul-n6310-s
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- const: kontron,imx6ul-n6310-som
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- const: fsl,imx6ul
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- description: i.MX6ULL based Boards
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@ -188,6 +202,7 @@ properties:
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- fsl,imx7d-sdb # i.MX7 SabreSD Board
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- novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board
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- tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM
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- zii,imx7d-rmu2 # ZII RMU2 Board
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- zii,imx7d-rpu2 # ZII RPU2 Board
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- const: fsl,imx7d
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@ -214,16 +229,26 @@ properties:
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- fsl,imx8mm-evk # i.MX8MM EVK Board
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- const: fsl,imx8mm
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- description: i.MX8MN based Boards
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items:
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- enum:
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- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
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- const: fsl,imx8mn
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- description: i.MX8MQ based Boards
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items:
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- enum:
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- boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board
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- fsl,imx8mq-evk # i.MX8MQ EVK Board
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- purism,librem5-devkit # Purism Librem5 devkit
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- solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse
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- technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk
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- const: fsl,imx8mq
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- description: i.MX8QXP based Boards
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items:
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- enum:
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- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
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- fsl,imx8qxp-mek # i.MX8QXP MEK Board
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- const: fsl,imx8qxp
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@ -283,6 +308,7 @@ properties:
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- description: LS1046A based Boards
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items:
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- enum:
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- fsl,ls1046a-frwy
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- fsl,ls1046a-qds
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- fsl,ls1046a-rdb
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- const: fsl,ls1046a
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@ -44,6 +44,10 @@ Optional properties:
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what bootloader sets up in IOMUXC_GPR1[11:0] will be
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used.
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- fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
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devices, the presence of this property indicates that
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the weim bus should operate in Burst Clock Mode.
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Timing property for child nodes. It is mandatory, not optional.
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- fsl,weim-cs-timing: The timing array, contains timing values for the
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@ -3,6 +3,7 @@ EEPROMs (SPI) compatible with Atmel at25.
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Required properties:
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- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".
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Example "<vendor>,<type>" values:
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"anvo,anv32e61w"
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"microchip,25lc040"
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"st,m95m02"
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"st,m95256"
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- reg : Address and length of the register set for the device
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- interrupts : Should contain uart interrupt
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- clocks : phandle + clock specifier pairs, one for each entry in clock-names
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- clock-names : should contain: "ipg" - the uart clock
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- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud
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clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access
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lpuart controller registers, it also requires "baud" clock for module to
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receive/transmit data.
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Optional properties:
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- dmas: A list of two dma specifiers, one for each entry in dma-names.
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@ -6,6 +6,7 @@ Required properties:
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or
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"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
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"fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
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"fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
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- reg : Offset and length of the register set for the device
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- interrupts : Should contain SPI controller interrupt
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- clocks: from common clock binding: handle to dspi clock.
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@ -81,6 +81,8 @@ patternProperties:
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description: Analogix Semiconductor, Inc.
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"^andestech,.*":
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description: Andes Technology Corporation
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"^anvo,.*":
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description: Anvo-Systems Dresden GmbH
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"^apm,.*":
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description: Applied Micro Circuits Corporation (APM)
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"^aptina,.*":
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description: Emerging Display Technologies
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"^eeti,.*":
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description: eGalax_eMPIA Technology Inc
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"^einfochips,.*":
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description: Einfochips
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"^elan,.*":
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description: Elan Microelectronic Corp.
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"^elgin,.*":
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