Merge remote-tracking branches 'spi/fix/gqspi', 'spi/fix/imx', 'spi/fix/mg-spfi' and 'spi/fix/spidev' into spi-linus
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commit
0c38ec716c
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@ -612,7 +612,7 @@ config SPI_XTENSA_XTFPGA
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config SPI_ZYNQMP_GQSPI
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config SPI_ZYNQMP_GQSPI
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tristate "Xilinx ZynqMP GQSPI controller"
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tristate "Xilinx ZynqMP GQSPI controller"
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depends on SPI_MASTER
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depends on SPI_MASTER && HAS_DMA
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help
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help
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Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.
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Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.
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@ -40,6 +40,7 @@
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#define SPFI_CONTROL_SOFT_RESET BIT(11)
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#define SPFI_CONTROL_SOFT_RESET BIT(11)
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#define SPFI_CONTROL_SEND_DMA BIT(10)
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#define SPFI_CONTROL_SEND_DMA BIT(10)
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#define SPFI_CONTROL_GET_DMA BIT(9)
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#define SPFI_CONTROL_GET_DMA BIT(9)
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#define SPFI_CONTROL_SE BIT(8)
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#define SPFI_CONTROL_TMODE_SHIFT 5
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#define SPFI_CONTROL_TMODE_SHIFT 5
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#define SPFI_CONTROL_TMODE_MASK 0x7
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#define SPFI_CONTROL_TMODE_MASK 0x7
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#define SPFI_CONTROL_TMODE_SINGLE 0
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#define SPFI_CONTROL_TMODE_SINGLE 0
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@ -491,6 +492,7 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi,
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else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
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else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
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xfer->rx_nbits == SPI_NBITS_QUAD)
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xfer->rx_nbits == SPI_NBITS_QUAD)
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val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
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val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
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val |= SPFI_CONTROL_SE;
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spfi_writel(spfi, val, SPFI_CONTROL);
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spfi_writel(spfi, val, SPFI_CONTROL);
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}
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}
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@ -201,8 +201,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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{
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
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struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
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if (spi_imx->dma_is_inited && (transfer->len > spi_imx->rx_wml)
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if (spi_imx->dma_is_inited
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&& (transfer->len > spi_imx->tx_wml))
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&& transfer->len > spi_imx->rx_wml * sizeof(u32)
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&& transfer->len > spi_imx->tx_wml * sizeof(u32))
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return true;
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return true;
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return false;
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return false;
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}
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}
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@ -214,6 +214,7 @@ static void zynqmp_gqspi_selectslave(struct zynqmp_qspi *instanceptr,
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case GQSPI_SELECT_FLASH_CS_BOTH:
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case GQSPI_SELECT_FLASH_CS_BOTH:
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instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER |
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instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER |
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GQSPI_GENFIFO_CS_UPPER;
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GQSPI_GENFIFO_CS_UPPER;
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break;
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case GQSPI_SELECT_FLASH_CS_UPPER:
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case GQSPI_SELECT_FLASH_CS_UPPER:
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instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER;
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instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER;
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break;
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break;
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@ -693,6 +693,7 @@ static struct class *spidev_class;
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#ifdef CONFIG_OF
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#ifdef CONFIG_OF
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static const struct of_device_id spidev_dt_ids[] = {
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static const struct of_device_id spidev_dt_ids[] = {
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{ .compatible = "rohm,dh2228fv" },
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{ .compatible = "rohm,dh2228fv" },
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{ .compatible = "lineartechnology,ltc2488" },
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{},
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{},
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};
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};
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MODULE_DEVICE_TABLE(of, spidev_dt_ids);
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MODULE_DEVICE_TABLE(of, spidev_dt_ids);
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