KVM: PPC: Critical interrupt emulation support
rfci instruction and CSRR0/1 registers are emulated. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -24,6 +24,7 @@
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#include "booke.h"
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#define OP_19_XOP_RFI 50
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#define OP_19_XOP_RFCI 51
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#define OP_31_XOP_MFMSR 83
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#define OP_31_XOP_WRTEE 131
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@ -36,6 +37,12 @@ static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
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kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
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}
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static void kvmppc_emul_rfci(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.pc = vcpu->arch.csrr0;
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kvmppc_set_msr(vcpu, vcpu->arch.csrr1);
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}
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int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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@ -52,6 +59,12 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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*advance = 0;
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break;
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case OP_19_XOP_RFCI:
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kvmppc_emul_rfci(vcpu);
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kvmppc_set_exit_type(vcpu, EMULATED_RFCI_EXITS);
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*advance = 0;
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break;
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default:
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emulated = EMULATE_FAIL;
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break;
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@ -113,6 +126,12 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
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case SPRN_ESR:
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vcpu->arch.shared->esr = spr_val;
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break;
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case SPRN_CSRR0:
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vcpu->arch.csrr0 = spr_val;
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break;
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case SPRN_CSRR1:
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vcpu->arch.csrr1 = spr_val;
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break;
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case SPRN_DBCR0:
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vcpu->arch.dbcr0 = spr_val;
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break;
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@ -232,6 +251,12 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
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case SPRN_ESR:
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*spr_val = vcpu->arch.shared->esr;
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break;
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case SPRN_CSRR0:
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*spr_val = vcpu->arch.csrr0;
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break;
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case SPRN_CSRR1:
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*spr_val = vcpu->arch.csrr1;
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break;
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case SPRN_DBCR0:
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*spr_val = vcpu->arch.dbcr0;
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break;
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