drm/amdgpu: fix amdgpu_gmc_gart_location a little bit
Improve the VCE limitation handling. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -120,24 +120,22 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
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mc->gart_size += adev->pm.smu_prv_buffer_size;
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size_af = adev->gmc.mc_mask - mc->vram_end;
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/* VCE doesn't like it when BOs cross a 4GB segment, so align
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* the GART base on a 4GB boundary as well.
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*/
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size_bf = mc->vram_start;
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if (size_bf > size_af) {
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if (mc->gart_size > size_bf) {
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dev_warn(adev->dev, "limiting GART\n");
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mc->gart_size = size_bf;
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}
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mc->gart_start = 0;
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} else {
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if (mc->gart_size > size_af) {
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dev_warn(adev->dev, "limiting GART\n");
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mc->gart_size = size_af;
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}
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/* VCE doesn't like it when BOs cross a 4GB segment, so align
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* the GART base on a 4GB boundary as well.
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*/
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mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
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size_af = adev->gmc.mc_mask + 1 -
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ALIGN(mc->vram_end + 1, 0x100000000ULL);
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if (mc->gart_size > max(size_bf, size_af)) {
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dev_warn(adev->dev, "limiting GART\n");
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mc->gart_size = max(size_bf, size_af);
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}
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if (size_bf > size_af)
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mc->gart_start = 0;
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else
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mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
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mc->gart_end = mc->gart_start + mc->gart_size - 1;
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dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
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mc->gart_size >> 20, mc->gart_start, mc->gart_end);
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