dt-bindings: irqchip: renesas-intc-irqpin: Convert to json-schema
Convert the Renesas Interrupt Controller (INTC) for external pins Device Tree binding documentation to json-schema. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Co-developed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [robh: drop allOf] Signed-off-by: Rob Herring <robh@kernel.org>
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Yoshihiro Kaneko
Rob Herring
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fba5618451
commit
0be4ae7488
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DT bindings for the R-/SH-Mobile irqpin controller
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Required properties:
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- compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"
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as fallback.
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Examples with soctypes are:
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- "renesas,intc-irqpin-r8a7740" (R-Mobile A1)
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- "renesas,intc-irqpin-r8a7778" (R-Car M1A)
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- "renesas,intc-irqpin-r8a7779" (R-Car H1)
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- "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)
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- reg: Base address and length of each register bank used by the external
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IRQ pins driven by the interrupt controller hardware module. The base
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addresses, length and number of required register banks varies with soctype.
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
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interrupts.txt in this directory.
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- interrupts: Must contain a list of interrupt specifiers. For each interrupt
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provided by this irqpin controller instance, there must be one entry,
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referring to the corresponding parent interrupt.
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Optional properties:
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- any properties, listed in interrupts.txt, and any standard resource allocation
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properties
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- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
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if different from the default 4 bits
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- control-parent: disable and enable interrupts on the parent interrupt
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controller, needed for some broken implementations
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- clocks: Must contain a reference to the functional clock. This property is
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mandatory if the hardware implements a controllable functional clock for
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the irqpin controller instance.
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- power-domains: Must contain a reference to the power domain. This property is
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mandatory if the irqpin controller instance is part of a controllable power
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domain.
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Example
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-------
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irqpin1: interrupt-controller@e6900004 {
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compatible = "renesas,intc-irqpin-r8a7740",
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"renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900004 4>,
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<0xe6900014 4>,
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH
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0 149 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
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power-domains = <&pd_a4s>;
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};
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@ -0,0 +1,107 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Interrupt Controller (INTC) for external pins
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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properties:
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compatible:
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items:
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- enum:
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- renesas,intc-irqpin-r8a7740 # R-Mobile A1
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- renesas,intc-irqpin-r8a7778 # R-Car M1A
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- renesas,intc-irqpin-r8a7779 # R-Car H1
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- renesas,intc-irqpin-sh73a0 # SH-Mobile AG5
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- const: renesas,intc-irqpin
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reg:
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minItems: 5
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items:
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- description: Interrupt control register
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- description: Interrupt priority register
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- description: Interrupt source register
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- description: Interrupt mask register
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- description: Interrupt mask clear register
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- description: Interrupt control register for ICR0 with IRLM0 bit
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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interrupts:
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minItems: 1
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maxItems: 8
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sense-bitfield-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [2, 4]
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default: 4
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description:
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Width of a single sense bitfield in the SENSE register, if different from the
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default.
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control-parent:
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type: boolean
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description:
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Disable and enable interrupts on the parent interrupt controller, needed for some
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broken implementations.
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupt-controller
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- '#interrupt-cells'
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- interrupts
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if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,intc-irqpin-r8a7740
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- renesas,intc-irqpin-sh73a0
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then:
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required:
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- clocks
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7740-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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irqpin1: interrupt-controller@e6900004 {
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compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
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reg = <0xe6900004 4>,
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<0xe6900014 4>,
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
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power-domains = <&pd_a4s>;
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};
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