iommu/amd: Support IOMMU_DOMAIN_DMA type allocation
This enables allocation of DMA-API default domains from the IOMMU core and switches allocation of domain dma-api domain to the IOMMU core too. Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Joerg Roedel
parent
aafd8ba0ca
commit
0bb6e243d7
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@ -64,10 +64,6 @@
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static DEFINE_RWLOCK(amd_iommu_devtable_lock);
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/* A list of preallocated protection domains */
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static LIST_HEAD(iommu_pd_list);
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static DEFINE_SPINLOCK(iommu_pd_list_lock);
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/* List of all available dev_data structures */
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static LIST_HEAD(dev_data_list);
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static DEFINE_SPINLOCK(dev_data_list_lock);
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@ -234,31 +230,38 @@ static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum)
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}
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/*
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* In this function the list of preallocated protection domains is traversed to
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* find the domain for a specific device
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* This function actually applies the mapping to the page table of the
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* dma_ops domain.
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*/
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static struct dma_ops_domain *find_protection_domain(u16 devid)
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static void alloc_unity_mapping(struct dma_ops_domain *dma_dom,
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struct unity_map_entry *e)
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{
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struct dma_ops_domain *entry, *ret = NULL;
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unsigned long flags;
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u16 alias = amd_iommu_alias_table[devid];
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u64 addr;
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if (list_empty(&iommu_pd_list))
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return NULL;
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spin_lock_irqsave(&iommu_pd_list_lock, flags);
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list_for_each_entry(entry, &iommu_pd_list, list) {
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if (entry->target_dev == devid ||
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entry->target_dev == alias) {
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ret = entry;
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break;
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}
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for (addr = e->address_start; addr < e->address_end;
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addr += PAGE_SIZE) {
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if (addr < dma_dom->aperture_size)
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__set_bit(addr >> PAGE_SHIFT,
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dma_dom->aperture[0]->bitmap);
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}
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}
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spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
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/*
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* Inits the unity mappings required for a specific device
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*/
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static void init_unity_mappings_for_device(struct device *dev,
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struct dma_ops_domain *dma_dom)
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{
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struct unity_map_entry *e;
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u16 devid;
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return ret;
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devid = get_device_id(dev);
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list_for_each_entry(e, &amd_iommu_unity_map, list) {
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if (!(devid >= e->devid_start && devid <= e->devid_end))
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continue;
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alloc_unity_mapping(dma_dom, e);
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}
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}
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/*
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@ -290,11 +293,23 @@ static bool check_device(struct device *dev)
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static void init_iommu_group(struct device *dev)
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{
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struct dma_ops_domain *dma_domain;
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struct iommu_domain *domain;
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struct iommu_group *group;
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group = iommu_group_get_for_dev(dev);
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if (!IS_ERR(group))
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iommu_group_put(group);
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if (IS_ERR(group))
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return;
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domain = iommu_group_default_domain(group);
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if (!domain)
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goto out;
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dma_domain = to_pdomain(domain)->priv;
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init_unity_mappings_for_device(dev, dma_domain);
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out:
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iommu_group_put(group);
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}
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static int __last_alias(struct pci_dev *pdev, u16 alias, void *data)
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@ -1414,94 +1429,6 @@ static unsigned long iommu_unmap_page(struct protection_domain *dom,
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return unmapped;
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}
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/*
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* This function checks if a specific unity mapping entry is needed for
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* this specific IOMMU.
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*/
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static int iommu_for_unity_map(struct amd_iommu *iommu,
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struct unity_map_entry *entry)
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{
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u16 bdf, i;
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for (i = entry->devid_start; i <= entry->devid_end; ++i) {
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bdf = amd_iommu_alias_table[i];
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if (amd_iommu_rlookup_table[bdf] == iommu)
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return 1;
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}
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return 0;
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}
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/*
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* This function actually applies the mapping to the page table of the
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* dma_ops domain.
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*/
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static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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struct unity_map_entry *e)
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{
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u64 addr;
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int ret;
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for (addr = e->address_start; addr < e->address_end;
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addr += PAGE_SIZE) {
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ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot,
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PAGE_SIZE);
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if (ret)
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return ret;
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/*
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* if unity mapping is in aperture range mark the page
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* as allocated in the aperture
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*/
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if (addr < dma_dom->aperture_size)
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__set_bit(addr >> PAGE_SHIFT,
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dma_dom->aperture[0]->bitmap);
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}
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return 0;
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}
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/*
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* Init the unity mappings for a specific IOMMU in the system
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*
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* Basically iterates over all unity mapping entries and applies them to
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* the default domain DMA of that IOMMU if necessary.
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*/
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static int iommu_init_unity_mappings(struct amd_iommu *iommu)
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{
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struct unity_map_entry *entry;
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int ret;
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list_for_each_entry(entry, &amd_iommu_unity_map, list) {
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if (!iommu_for_unity_map(iommu, entry))
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continue;
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ret = dma_ops_unity_map(iommu->default_dom, entry);
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if (ret)
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return ret;
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}
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return 0;
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}
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/*
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* Inits the unity mappings required for a specific device
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*/
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static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
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u16 devid)
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{
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struct unity_map_entry *e;
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int ret;
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list_for_each_entry(e, &amd_iommu_unity_map, list) {
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if (!(devid >= e->devid_start && devid <= e->devid_end))
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continue;
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ret = dma_ops_unity_map(dma_dom, e);
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if (ret)
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return ret;
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}
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return 0;
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}
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/****************************************************************************
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*
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* The next functions belong to the address allocator for the dma_ops
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@ -2324,42 +2251,9 @@ static void detach_device(struct device *dev)
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dev_data->ats.enabled = false;
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}
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/*
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* Find out the protection domain structure for a given PCI device. This
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* will give us the pointer to the page table root for example.
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*/
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static struct protection_domain *domain_for_device(struct device *dev)
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{
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struct iommu_dev_data *dev_data;
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struct protection_domain *dom = NULL;
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unsigned long flags;
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dev_data = get_dev_data(dev);
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if (dev_data->domain)
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return dev_data->domain;
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if (dev_data->alias_data != NULL) {
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struct iommu_dev_data *alias_data = dev_data->alias_data;
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read_lock_irqsave(&amd_iommu_devtable_lock, flags);
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if (alias_data->domain != NULL) {
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__attach_device(dev_data, alias_data->domain);
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dom = alias_data->domain;
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}
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read_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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}
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return dom;
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}
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static int amd_iommu_add_device(struct device *dev)
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{
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struct dma_ops_domain *dma_domain;
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struct protection_domain *domain;
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struct iommu_dev_data *dev_data;
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struct amd_iommu *iommu;
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unsigned long flags;
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u16 devid;
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int ret;
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@ -2376,35 +2270,6 @@ static int amd_iommu_add_device(struct device *dev)
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}
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init_iommu_group(dev);
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dev_data = get_dev_data(dev);
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if (iommu_pass_through || dev_data->iommu_v2) {
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/* Make sure passthrough domain is allocated */
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alloc_passthrough_domain();
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dev_data->passthrough = true;
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attach_device(dev, pt_domain);
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goto out;
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}
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domain = domain_for_device(dev);
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/* allocate a protection domain if a device is added */
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dma_domain = find_protection_domain(devid);
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if (!dma_domain) {
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dma_domain = dma_ops_domain_alloc();
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if (!dma_domain)
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goto out;
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dma_domain->target_dev = devid;
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init_unity_mappings_for_device(dma_domain, devid);
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spin_lock_irqsave(&iommu_pd_list_lock, flags);
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list_add_tail(&dma_domain->list, &iommu_pd_list);
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spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
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}
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attach_device(dev, &dma_domain->domain);
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dev->archdata.dma_ops = &amd_iommu_dma_ops;
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out:
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@ -2445,34 +2310,19 @@ static struct protection_domain *get_domain(struct device *dev)
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{
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struct protection_domain *domain;
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struct iommu_domain *io_domain;
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struct dma_ops_domain *dma_dom;
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u16 devid = get_device_id(dev);
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if (!check_device(dev))
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return ERR_PTR(-EINVAL);
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io_domain = iommu_get_domain_for_dev(dev);
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if (io_domain) {
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domain = to_pdomain(io_domain);
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return domain;
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}
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if (!io_domain)
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return NULL;
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domain = domain_for_device(dev);
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if (domain != NULL && !dma_ops_domain(domain))
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domain = to_pdomain(io_domain);
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if (!dma_ops_domain(domain))
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return ERR_PTR(-EBUSY);
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if (domain != NULL)
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return domain;
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/* Device not bound yet - bind it */
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dma_dom = find_protection_domain(devid);
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if (!dma_dom)
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dma_dom = amd_iommu_rlookup_table[devid]->default_dom;
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attach_device(dev, &dma_dom->domain);
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DUMP_printk("Using protection domain %d for device %s\n",
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dma_dom->domain.id, dev_name(dev));
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return &dma_dom->domain;
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return domain;
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}
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static void update_device_table(struct protection_domain *domain)
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@ -3014,23 +2864,7 @@ void __init amd_iommu_init_api(void)
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int __init amd_iommu_init_dma_ops(void)
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{
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struct amd_iommu *iommu;
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int ret, unhandled;
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/*
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* first allocate a default protection domain for every IOMMU we
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* found in the system. Devices not assigned to any other
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* protection domain will be assigned to the default one.
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*/
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for_each_iommu(iommu) {
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iommu->default_dom = dma_ops_domain_alloc();
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if (iommu->default_dom == NULL)
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return -ENOMEM;
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iommu->default_dom->domain.flags |= PD_DEFAULT_MASK;
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ret = iommu_init_unity_mappings(iommu);
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if (ret)
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goto free_domains;
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}
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int unhandled;
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iommu_detected = 1;
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swiotlb = 0;
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@ -3050,14 +2884,6 @@ int __init amd_iommu_init_dma_ops(void)
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pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n");
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return 0;
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free_domains:
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for_each_iommu(iommu) {
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dma_ops_domain_free(iommu->default_dom);
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}
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return ret;
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}
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/*****************************************************************************
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@ -3142,30 +2968,39 @@ static int alloc_passthrough_domain(void)
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static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
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{
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struct protection_domain *pdomain;
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struct dma_ops_domain *dma_domain;
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/* We only support unmanaged domains for now */
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if (type != IOMMU_DOMAIN_UNMANAGED)
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switch (type) {
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case IOMMU_DOMAIN_UNMANAGED:
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pdomain = protection_domain_alloc();
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if (!pdomain)
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return NULL;
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pdomain->mode = PAGE_MODE_3_LEVEL;
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pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);
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if (!pdomain->pt_root) {
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protection_domain_free(pdomain);
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return NULL;
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}
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pdomain->domain.geometry.aperture_start = 0;
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pdomain->domain.geometry.aperture_end = ~0ULL;
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pdomain->domain.geometry.force_aperture = true;
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break;
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case IOMMU_DOMAIN_DMA:
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dma_domain = dma_ops_domain_alloc();
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if (!dma_domain) {
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pr_err("AMD-Vi: Failed to allocate\n");
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return NULL;
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}
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pdomain = &dma_domain->domain;
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break;
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default:
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return NULL;
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pdomain = protection_domain_alloc();
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if (!pdomain)
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goto out_free;
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pdomain->mode = PAGE_MODE_3_LEVEL;
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pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);
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if (!pdomain->pt_root)
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goto out_free;
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pdomain->domain.geometry.aperture_start = 0;
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pdomain->domain.geometry.aperture_end = ~0ULL;
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pdomain->domain.geometry.force_aperture = true;
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}
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return &pdomain->domain;
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out_free:
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protection_domain_free(pdomain);
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return NULL;
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}
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static void amd_iommu_domain_free(struct iommu_domain *dom)
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@ -552,9 +552,6 @@ struct amd_iommu {
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/* if one, we need to send a completion wait command */
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bool need_sync;
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/* default dma_ops domain for that IOMMU */
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struct dma_ops_domain *default_dom;
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/* IOMMU sysfs device */
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struct device *iommu_dev;
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