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Samsung DTS ARM changes for v5.15 

Add CPU topology to all Exynos DTSI files.
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Merge tag 'samsung-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.15

Add CPU topology to all Exynos DTSI files.

* tag 'samsung-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: add CPU topology to Exynos5422
  ARM: dts: exynos: add CPU topology to Exynos5420
  ARM: dts: exynos: add CPU topology to Exynos5260
  ARM: dts: exynos: add CPU topology to Exynos5250
  ARM: dts: exynos: add CPU topology to Exynos4412
  ARM: dts: exynos: add CPU topology to Exynos4210
  ARM: dts: exynos: add CPU topology to Exynos3250

Link: https://lore.kernel.org/r/20210811085128.30103-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-08-12 22:55:17 +02:00
parent c2632c3afe 6cad6db752
commit 0b72a27e1d
7 changed files with 146 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -50,6 +50,17 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";

11
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -32,6 +32,17 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@900 {
device_type = "cpu";
compatible = "arm,cortex-a9";

17
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -35,6 +35,23 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
};
cpu0: cpu@a00 {
device_type = "cpu";
compatible = "arm,cortex-a9";

11
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -50,6 +50,17 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";

38
arch/arm/boot/dts/exynos5260.dtsi
View File

@ -34,42 +34,68 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
cluster1 {
core0 {
cpu = <&cpu2>;
};
core1 {
cpu = <&cpu3>;
};
core2 {
cpu = <&cpu4>;
};
core3 {
cpu = <&cpu5>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
cci-control-port = <&cci_control1>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
cci-control-port = <&cci_control1>;
};
cpu@100 {
cpu2: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
cci-control-port = <&cci_control0>;
};
cpu@101 {
cpu3: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x101>;
cci-control-port = <&cci_control0>;
};
cpu@102 {
cpu4: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x102>;
cci-control-port = <&cci_control0>;
};
cpu@103 {
cpu5: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x103>;

32
arch/arm/boot/dts/exynos5420-cpus.dtsi
View File

@ -22,6 +22,38 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
core3 {
cpu = <&cpu7>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";

32
arch/arm/boot/dts/exynos5422-cpus.dtsi
View File

@ -21,6 +21,38 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
core3 {
cpu = <&cpu7>;
};
};
};
cpu0: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";