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x86: clean up the APIC_DEST_LOGICAL logic 

Impact: cleanup

The bigsmp and es7000 subarchitectures un-defined APIC_DEST_LOGICAL in
a rather nasty way by re-defining it to zero. That is infinitely
fragile and makes it very hard to see what to code really does in
a given context. The very same constant has different meanings and
values - depending on which subarch is enabled.

Untangle this mess by never undefining the constant, but instead
propagating the right values into the genapic driver templates.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar 2009-01-28 05:13:04 +01:00
parent 08125d3eda
commit 0b06e734bf
12 changed files with 19 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/include/asm/bigsmp/apic.h
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@ -17,8 +17,6 @@ static inline const cpumask_t *bigsmp_target_cpus(void)
#endif
}
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define NO_BALANCE_IRQ (0)

2
arch/x86/include/asm/es7000/apic.h
View File

@ -27,8 +27,6 @@ static inline const cpumask_t *es7000_target_cpus(void)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{

2
arch/x86/include/asm/mach-generic/mach_apic.h
View File

@ -4,8 +4,6 @@
#include <asm/genapic.h>
#define NO_BALANCE_IRQ (apic->no_balance_irq)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
#define init_apic_ldr (apic->init_apic_ldr)
#define ioapic_phys_id_map (apic->ioapic_phys_id_map)
#define setup_apic_routing (apic->setup_apic_routing)

12
arch/x86/kernel/genapic_flat_64.c
View File

@ -74,7 +74,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
unsigned long flags;
local_irq_save(flags);
__send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
__send_IPI_dest_field(mask, vector, apic->apic_destination_logical);
local_irq_restore(flags);
}
@ -114,7 +114,7 @@ static void flat_send_IPI_allbutself(int vector)
_flat_send_IPI_mask(mask, vector);
}
} else if (num_online_cpus() > 1) {
__send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
__send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->apic_destination_logical);
}
}
@ -123,7 +123,7 @@ static void flat_send_IPI_all(int vector)
if (vector == NMI_VECTOR)
flat_send_IPI_mask(cpu_online_mask, vector);
else
__send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
__send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->apic_destination_logical);
}
static unsigned int get_apic_id(unsigned long x)
@ -181,11 +181,11 @@ struct genapic apic_flat = {
.apic_id_registered = flat_apic_id_registered,
.irq_delivery_mode = dest_LowestPrio,
.irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.irq_dest_mode = 1, /* logical */
.target_cpus = flat_target_cpus,
.disable_esr = 0,
.apic_destination_logical = 0,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
@ -327,7 +327,7 @@ struct genapic apic_physflat = {
.apic_id_registered = flat_apic_id_registered,
.irq_delivery_mode = dest_Fixed,
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.irq_dest_mode = 0, /* physical */
.target_cpus = physflat_target_cpus,
.disable_esr = 0,

10
arch/x86/kernel/genx2apic_cluster.c
View File

@ -64,7 +64,7 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
for_each_cpu(query_cpu, mask)
__x2apic_send_IPI_dest(
per_cpu(x86_cpu_to_logical_apicid, query_cpu),
vector, APIC_DEST_LOGICAL);
vector, apic->apic_destination_logical);
local_irq_restore(flags);
}
@ -80,7 +80,7 @@ static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
if (query_cpu != this_cpu)
__x2apic_send_IPI_dest(
per_cpu(x86_cpu_to_logical_apicid, query_cpu),
vector, APIC_DEST_LOGICAL);
vector, apic->apic_destination_logical);
local_irq_restore(flags);
}
@ -95,7 +95,7 @@ static void x2apic_send_IPI_allbutself(int vector)
if (query_cpu != this_cpu)
__x2apic_send_IPI_dest(
per_cpu(x86_cpu_to_logical_apicid, query_cpu),
vector, APIC_DEST_LOGICAL);
vector, apic->apic_destination_logical);
local_irq_restore(flags);
}
@ -183,11 +183,11 @@ struct genapic apic_x2apic_cluster = {
.apic_id_registered = x2apic_apic_id_registered,
.irq_delivery_mode = dest_LowestPrio,
.irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.irq_dest_mode = 1, /* logical */
.target_cpus = x2apic_target_cpus,
.disable_esr = 0,
.apic_destination_logical = 0,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = NULL,
.check_apicid_present = NULL,

2
arch/x86/kernel/genx2apic_phys.c
View File

@ -179,7 +179,7 @@ struct genapic apic_x2apic_phys = {
.apic_id_registered = x2apic_apic_id_registered,
.irq_delivery_mode = dest_Fixed,
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.irq_dest_mode = 0, /* physical */
.target_cpus = x2apic_target_cpus,
.disable_esr = 0,

4
arch/x86/kernel/genx2apic_uv_x.c
View File

@ -244,11 +244,11 @@ struct genapic apic_x2apic_uv_x = {
.apic_id_registered = uv_apic_id_registered,
.irq_delivery_mode = dest_Fixed,
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.irq_dest_mode = 1, /* logical */
.target_cpus = uv_target_cpus,
.disable_esr = 0,
.apic_destination_logical = 0,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = NULL,
.check_apicid_present = NULL,

2
arch/x86/kernel/io_apic.c
View File

@ -806,7 +806,7 @@ void send_IPI_self(int vector)
* Wait for idle.
*/
apic_wait_icr_idle();
cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | apic->apic_destination_logical;
/*
* Send the IPI. The write to APIC_ICR fires this off.
*/

2
arch/x86/kernel/ipi.c
View File

@ -30,7 +30,7 @@
static inline int __prepare_ICR(unsigned int shortcut, int vector)
{
unsigned int icr = shortcut | APIC_DEST_LOGICAL;
unsigned int icr = shortcut | apic->apic_destination_logical;
switch (vector) {
default:

2
arch/x86/kernel/smpboot.c
View File

@ -583,7 +583,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
/* Target chip */
/* Boot on the stack */
/* Kick the second */
apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid);
apic_icr_write(APIC_DM_NMI | apic->apic_destination_logical, logical_apicid);
pr_debug("Waiting for send to finish...\n");
send_status = safe_apic_wait_icr_idle();

2
arch/x86/mach-generic/bigsmp.c
View File

@ -70,7 +70,7 @@ struct genapic apic_bigsmp = {
.target_cpus = bigsmp_target_cpus,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.apic_destination_logical = 0,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,

2
arch/x86/mach-generic/es7000.c
View File

@ -113,7 +113,7 @@ struct genapic apic_es7000 = {
.target_cpus = es7000_target_cpus,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.apic_destination_logical = 0,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,