ASoC: dt-bindings: fsl_xcvr: Add document for XCVR
XCVR (Audio Transceiver) is a new IP module found on i.MX8MP. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201013121733.83684-3-viorel.suman@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP Audio Transceiver (XCVR) Controller
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maintainers:
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- Viorel Suman <viorel.suman@nxp.com>
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description: |
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NXP XCVR (Audio Transceiver) is a on-chip functional module
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that allows CPU to receive and transmit digital audio via
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HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
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properties:
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$nodename:
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pattern: "^xcvr@.*"
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compatible:
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enum:
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- fsl,imx8mp-xcvr
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reg:
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items:
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- description: 20K RAM for code and data
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- description: registers space
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- description: RX FIFO address
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- description: TX FIFO address
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reg-names:
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items:
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- const: ram
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- const: regs
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- const: rxfifo
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- const: txfifo
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Peripheral clock
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- description: PHY clock
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- description: SPBA clock
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- description: PLL clock
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clock-names:
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items:
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- const: ipg
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- const: phy
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- const: spba
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- const: pll_ipg
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dmas:
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items:
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- description: DMA controller phandle and request line for RX
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- description: DMA controller phandle and request line for TX
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dma-names:
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items:
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- const: rx
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- const: tx
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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- dmas
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- dma-names
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/reset/imx8mp-reset.h>
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xcvr: xcvr@30cc0000 {
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compatible = "fsl,imx8mp-xcvr";
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reg = <0x30cc0000 0x800>,
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<0x30cc0800 0x400>,
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<0x30cc0c00 0x080>,
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<0x30cc0e00 0x080>;
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reg-names = "ram", "regs", "rxfifo", "txfifo";
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interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
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<&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
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<&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
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<&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
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clock-names = "ipg", "phy", "spba", "pll_ipg";
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dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
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dma-names = "rx", "tx";
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resets = <&audiomix_reset 0>;
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};
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