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AT91 DT for 4.21 

- Switch most platforms to the new clock binding
  - Small improvement for Axentia nattis
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Merge tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into next/dt

AT91 DT for 4.21

 - Switch most platforms to the new clock binding
 - Small improvement for Axentia nattis

* tag 'at91-4.21-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: nattis: initialize the BLON pin as output-low early
  ARM: dts: at91: at91sam9rl: switch to new clock bindings
  ARM: dts: at91: at91sam9x5: switch to new clock bindings
  ARM: dts: at91: at91sam9263: switch to new clock bindings
  ARM: dts: at91: at91sam9261: switch to new clock bindings
  ARM: dts: at91: at91sam9260: switch to new clock bindings
  ARM: dts: at91: sama5d2: switch to new clock binding
  ARM: dts: at91: sama5d4: switch to new clock bindings
  ARM: dts: at91: sama5d2: use the divided clock for SMC

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-12-12 13:04:41 -08:00
parent ac3e0be697 d8007306f6
commit 0abf32a837
25 changed files with 295 additions and 2541 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/boot/dts/at91-nattis-2-natte-2.dts
View File

@ -60,6 +60,8 @@
power-supply = <&bl_reg>;
enable-gpios = <&pioA 20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_blon>;
};
panel: panel {
@ -164,6 +166,12 @@
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
pinctrl_blon: blon {
atmel,pins = <AT91_PIOA 20 AT91_PERIPH_GPIO
(AT91_PINCTRL_OUTPUT |
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
};
};

12
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View File

@ -165,7 +165,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_i2c>;
atmel,fifo-size = <16>;
@ -211,7 +211,7 @@
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
@ -223,7 +223,7 @@
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "spi_clk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
@ -240,7 +240,7 @@
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
@ -252,7 +252,7 @@
compatible = "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "spi_clk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
@ -268,7 +268,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;

2
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
View File

@ -197,7 +197,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
atmel,fifo-size = <16>;

4
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View File

@ -258,7 +258,7 @@
compatible = "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&flx0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
clock-names = "usart";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
@ -313,7 +313,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;

2
arch/arm/boot/dts/at91-sama5d4ek.dts
View File

@ -115,7 +115,7 @@
wm8904: codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&pck2>;
clocks = <&pmc PMC_TYPE_SYSTEM 10>;
clock-names = "mclk";
};

308
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -113,276 +113,28 @@
compatible = "atmel,at91sam9260-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
clocks = <&main_osc>;
};
slow_rc_osc: slow_rc_osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9260-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc>, <&slow_xtal>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
<150000000 240000000 2 1>;
};
pllb: pllbck {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
clocks = <&main>;
reg = <1>;
atmel,clk-input-range = <1000000 5000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 105000000>;
atmel,clk-divisors = <1 2 4 0>;
};
usb: usbck {
compatible = "atmel,at91rm9200-clk-usb";
#clock-cells = <0>;
atmel,clk-divisors = <1 2 4 0>;
clocks = <&pllb>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <3>;
};
pioC_clk: pioC_clk {
#clock-cells = <0>;
reg = <4>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <5>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <8>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <9>;
};
udc_clk: udc_clk {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk {
reg = <11>;
#clock-cells = <0>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <12>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <14>;
};
tc0_clk: tc0_clk {
#clock-cells = <0>;
reg = <17>;
};
tc1_clk: tc1_clk {
#clock-cells = <0>;
reg = <18>;
};
tc2_clk: tc2_clk {
#clock-cells = <0>;
reg = <19>;
};
ohci_clk: ohci_clk {
#clock-cells = <0>;
reg = <20>;
};
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <21>;
};
isi_clk: isi_clk {
#clock-cells = <0>;
reg = <22>;
};
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <23>;
};
uart0_clk: uart0_clk {
#clock-cells = <0>;
reg = <24>;
};
uart1_clk: uart1_clk {
#clock-cells = <0>;
reg = <25>;
};
tc3_clk: tc3_clk {
#clock-cells = <0>;
reg = <26>;
};
tc4_clk: tc4_clk {
#clock-cells = <0>;
reg = <27>;
};
tc5_clk: tc5_clk {
#clock-cells = <0>;
reg = <28>;
};
};
#clock-cells = <2>;
clocks = <&slow_xtal>, <&main_xtal>;
clock-names = "slow_xtal", "main_xtal";
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
clocks = <&clk32k>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&clk32k>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
tcb0: timer@fffa0000 {
@ -393,7 +145,7 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@ -405,7 +157,7 @@
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
27 IRQ_TYPE_LEVEL_HIGH 0
28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@ -746,7 +498,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff600 {
@ -757,7 +509,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioC: gpio@fffff800 {
@ -768,7 +520,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
};
@ -778,7 +530,7 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
@ -791,7 +543,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
@ -804,7 +556,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -817,7 +569,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
@ -830,7 +582,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "usart";
status = "disabled";
};
@ -843,7 +595,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
clocks = <&uart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
clock-names = "usart";
status = "disabled";
};
@ -856,7 +608,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
clocks = <&uart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
clock-names = "usart";
status = "disabled";
};
@ -867,7 +619,7 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
clock-names = "hclk", "pclk";
status = "disabled";
};
@ -876,7 +628,7 @@
compatible = "atmel,at91sam9260-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udc_clk>, <&udpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
clock-names = "pclk", "hclk";
status = "disabled";
};
@ -887,7 +639,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
status = "disabled";
};
@ -898,7 +650,7 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "mci_clk";
status = "disabled";
};
@ -909,7 +661,7 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "pclk";
status = "disabled";
};
@ -922,7 +674,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "spi_clk";
status = "disabled";
};
@ -935,7 +687,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
status = "disabled";
};
@ -946,7 +698,7 @@
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&adc_clk>, <&adc_op_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xf>;
@ -981,7 +733,7 @@
compatible = "atmel,at91sam9260-rtt";
reg = <0xfffffd20 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&clk32k>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
status = "disabled";
};
@ -989,7 +741,7 @@
compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffd40 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&clk32k>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
atmel,watchdog-type = "hardware";
atmel,reset-type = "all";
atmel,dbg-halt;
@ -1007,7 +759,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -1027,7 +779,7 @@
0x5 0x0 0x60000000 0x10000000
0x6 0x0 0x70000000 0x10000000
0x7 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {

287
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -75,7 +75,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -86,7 +86,7 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
clocks = <&lcd_clk>, <&hclk1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
clock-names = "lcdc_clk", "hclk";
status = "disabled";
};
@ -106,7 +106,7 @@
0x5 0x0 0x60000000 0x10000000
0x6 0x0 0x70000000 0x10000000
0x7 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {
@ -132,7 +132,7 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>,
<19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@ -140,7 +140,7 @@
compatible = "atmel,at91sam9261-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udc_clk>, <&udpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
clock-names = "pclk", "hclk";
atmel,matrix = <&matrix>;
status = "disabled";
@ -154,7 +154,7 @@
pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "mci_clk";
status = "disabled";
};
@ -167,7 +167,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
status = "disabled";
};
@ -179,7 +179,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
@ -192,7 +192,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -205,7 +205,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
@ -216,7 +216,7 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "pclk";
status = "disabled";
};
@ -227,7 +227,7 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
clocks = <&ssc1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "pclk";
status = "disabled";
};
@ -238,7 +238,7 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
clocks = <&ssc2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "pclk";
status = "disabled";
};
@ -252,7 +252,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "spi_clk";
status = "disabled";
};
@ -265,7 +265,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
status = "disabled";
};
@ -299,7 +299,7 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
@ -563,7 +563,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff600 {
@ -574,7 +574,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioC: gpio@fffff800 {
@ -585,7 +585,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
};
@ -593,250 +593,9 @@
compatible = "atmel,at91sam9261-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
clocks = <&main_osc>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
<190000000 240000000 2 1>;
};
pllb: pllbck {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
clocks = <&main>;
reg = <1>;
atmel,clk-input-range = <1000000 5000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
};
usb: usbck {
compatible = "atmel,at91rm9200-clk-usb";
#clock-cells = <0>;
atmel,clk-divisors = <1 2 4 0>;
clocks = <&pllb>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
prog3: prog3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
pck3: pck3 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
hclk0: hclk0 {
#clock-cells = <0>;
reg = <16>;
clocks = <&mck>;
};
hclk1: hclk1 {
#clock-cells = <0>;
reg = <17>;
clocks = <&mck>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <3>;
};
pioC_clk: pioC_clk {
#clock-cells = <0>;
reg = <4>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <8>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <9>;
};
udc_clk: udc_clk {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk {
reg = <11>;
#clock-cells = <0>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <12>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <14>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <15>;
};
ssc2_clk: ssc2_clk {
#clock-cells = <0>;
reg = <16>;
};
tc0_clk: tc0_clk {
#clock-cells = <0>;
reg = <17>;
};
tc1_clk: tc1_clk {
#clock-cells = <0>;
reg = <18>;
};
tc2_clk: tc2_clk {
#clock-cells = <0>;
reg = <19>;
};
ohci_clk: ohci_clk {
#clock-cells = <0>;
reg = <20>;
};
lcd_clk: lcd_clk {
#clock-cells = <0>;
reg = <21>;
};
};
#clock-cells = <2>;
clocks = <&slow_xtal>, <&main_xtal>;
clock-names = "slow_xtal", "main_xtal";
};
rstc@fffffd00 {
@ -855,7 +614,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
rtc@fffffd20 {

315
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -96,264 +96,9 @@
compatible = "atmel,at91sam9263-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
clocks = <&main_osc>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
<190000000 240000000 2 1>;
};
pllb: pllbck {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
clocks = <&main>;
reg = <1>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
<190000000 240000000 2 1>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 120000000>;
atmel,clk-divisors = <1 2 4 0>;
};
usb: usbck {
compatible = "atmel,at91rm9200-clk-usb";
#clock-cells = <0>;
atmel,clk-divisors = <1 2 4 0>;
clocks = <&pllb>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
prog3: prog3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
pck3: pck3 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <3>;
};
pioCDE_clk: pioCDE_clk {
#clock-cells = <0>;
reg = <4>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <7>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <8>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <9>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <10>;
};
mci1_clk: mci1_clk {
#clock-cells = <0>;
reg = <11>;
};
can_clk: can_clk {
#clock-cells = <0>;
reg = <12>;
};
twi0_clk: twi0_clk {
#clock-cells = <0>;
reg = <13>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <14>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <15>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <16>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <17>;
};
ac97_clk: ac97_clk {
#clock-cells = <0>;
reg = <18>;
};
tcb_clk: tcb_clk {
#clock-cells = <0>;
reg = <19>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <20>;
};
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <21>;
};
g2de_clk: g2de_clk {
#clock-cells = <0>;
reg = <23>;
};
udc_clk: udc_clk {
#clock-cells = <0>;
reg = <24>;
};
isi_clk: isi_clk {
#clock-cells = <0>;
reg = <25>;
};
lcd_clk: lcd_clk {
#clock-cells = <0>;
reg = <26>;
};
dma_clk: dma_clk {
#clock-cells = <0>;
reg = <27>;
};
ohci_clk: ohci_clk {
#clock-cells = <0>;
reg = <29>;
};
};
#clock-cells = <2>;
clocks = <&slow_xtal>, <&main_xtal>;
clock-names = "slow_xtal", "main_xtal";
};
ramc0: ramc@ffffe200 {
@ -385,7 +130,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
tcb0: timer@fff7c000 {
@ -394,7 +139,7 @@
#size-cells = <0>;
reg = <0xfff7c000 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb_clk>, <&slow_xtal>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
clock-names = "t0_clk", "slow_clk";
};
@ -736,7 +481,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff400 {
@ -747,7 +492,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioC: gpio@fffff600 {
@ -758,7 +503,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
pioD: gpio@fffff800 {
@ -769,7 +514,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
pioE: gpio@fffffa00 {
@ -780,7 +525,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
};
@ -790,7 +535,7 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
@ -803,7 +548,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -816,7 +561,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
@ -829,7 +574,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "usart";
status = "disabled";
};
@ -840,7 +585,7 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "pclk";
status = "disabled";
};
@ -851,7 +596,7 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
clocks = <&ssc1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
clock-names = "pclk";
status = "disabled";
};
@ -862,7 +607,7 @@
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ac97>;
clocks = <&ac97_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
clock-names = "ac97_clk";
status = "disabled";
};
@ -873,7 +618,7 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
clock-names = "hclk", "pclk";
status = "disabled";
};
@ -882,7 +627,7 @@
compatible = "atmel,at91sam9263-udc";
reg = <0xfff78000 0x4000>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udc_clk>, <&udpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
clock-names = "pclk", "hclk";
status = "disabled";
};
@ -893,7 +638,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
status = "disabled";
};
@ -904,7 +649,7 @@
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
clock-names = "mci_clk";
status = "disabled";
};
@ -916,7 +661,7 @@
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
clock-names = "mci_clk";
status = "disabled";
};
@ -940,7 +685,7 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "spi_clk";
status = "disabled";
};
@ -953,7 +698,7 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "spi_clk";
status = "disabled";
};
@ -963,7 +708,7 @@
reg = <0xfffb8000 0x300>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
clock-names = "pwm_clk";
status = "disabled";
};
@ -974,7 +719,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_rx_tx>;
clocks = <&can_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "can_clk";
};
@ -1007,7 +752,7 @@
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
clocks = <&lcd_clk>, <&lcd_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
clock-names = "lcdc_clk", "hclk";
status = "disabled";
};
@ -1016,7 +761,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -1034,7 +779,7 @@
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller0: nand-controller {
@ -1055,7 +800,7 @@
reg = <0x80000000 0x20000000>;
ranges = <0x0 0x0 0x80000000 0x10000000
0x1 0x0 0x90000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller1: nand-controller {

4
arch/arm/boot/dts/at91sam9g15.dtsi
View File

@ -24,6 +24,10 @@
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g15-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};

23
arch/arm/boot/dts/at91sam9g20.dtsi
View File

@ -40,28 +40,7 @@
};
pmc: pmc@fffffc00 {
plla: pllack {
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
<695000000 750000000 1 0>,
<645000000 700000000 2 0>,
<595000000 650000000 3 0>,
<545000000 600000000 0 1>,
<495000000 550000000 1 1>,
<445000000 500000000 2 1>,
<400000000 450000000 3 1>;
};
pllb: pllbck {
compatible = "atmel,at91sam9g20-clk-pllb";
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
};
mck: masterck {
atmel,clk-output-range = <0 133000000>;
atmel,clk-divisors = <1 2 4 6>;
};
compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
};
};
};

4
arch/arm/boot/dts/at91sam9g25.dtsi
View File

@ -26,6 +26,10 @@
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};

4
arch/arm/boot/dts/at91sam9g25ek.dts
View File

@ -32,9 +32,9 @@
pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
clocks = <&pck0>;
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "xvclk";
assigned-clocks = <&pck0>;
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
assigned-clock-rates = <25000000>;
status = "okay";

4
arch/arm/boot/dts/at91sam9g35.dtsi
View File

@ -25,6 +25,10 @@
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};

239
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -88,7 +88,7 @@
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
clocks = <&lcd_clk>, <&lcd_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "hclk", "lcdc_clk";
status = "disabled";
};
@ -106,7 +106,7 @@
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {
@ -132,7 +132,7 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
<17 IRQ_TYPE_LEVEL_HIGH 0>,
<18 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
@ -143,7 +143,7 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
clock-names = "mci_clk";
status = "disabled";
};
@ -154,7 +154,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
status = "disabled";
};
@ -175,7 +175,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
@ -188,7 +188,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -201,7 +201,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};
@ -214,7 +214,7 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "usart";
status = "disabled";
};
@ -242,7 +242,7 @@
reg = <0xfffc8000 0x300>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
clock-names = "pwm_clk";
status = "disabled";
};
@ -255,7 +255,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
status = "disabled";
};
@ -266,7 +266,7 @@
compatible = "atmel,at91sam9rl-adc";
reg = <0xfffd0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&adc_clk>, <&adc_op_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0x3f>;
@ -304,7 +304,7 @@
reg = <0x00600000 0x100000>,
<0xfffd4000 0x4000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udphs_clk>, <&utmi>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
clock-names = "pclk", "hclk";
status = "disabled";
@ -366,7 +366,7 @@
reg = <0xffffe600 0x200>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
clocks = <&dma0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
clock-names = "dma_clk";
};
@ -399,7 +399,7 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
@ -794,7 +794,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff600 {
@ -805,7 +805,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioC: gpio@fffff800 {
@ -816,7 +816,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
};
pioD: gpio@fffffa00 {
@ -827,7 +827,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioD_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
};
};
@ -835,202 +835,9 @@
compatible = "atmel,at91sam9rl-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <1000000 32000000>;
#atmel,pll-clk-output-range-cells = <3>;
atmel,pll-clk-output-ranges = <80000000 200000000 0>,
<190000000 240000000 2>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKU>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91rm9200-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
};
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
};
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <3>;
};
pioC_clk: pioC_clk {
#clock-cells = <0>;
reg = <4>;
};
pioD_clk: pioD_clk {
#clock-cells = <0>;
reg = <5>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <8>;
};
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <9>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk {
#clock-cells = <0>;
reg = <11>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <12>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <14>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <15>;
};
tc0_clk: tc0_clk {
#clock-cells = <0>;
reg = <16>;
};
tc1_clk: tc1_clk {
#clock-cells = <0>;
reg = <17>;
};
tc2_clk: tc2_clk {
#clock-cells = <0>;
reg = <18>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <19>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <20>;
};
dma0_clk: dma0_clk {
#clock-cells = <0>;
reg = <21>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <22>;
};
lcd_clk: lcd_clk {
#clock-cells = <0>;
reg = <23>;
};
};
#clock-cells = <2>;
clocks = <&clk32k>, <&main_xtal>;
clock-names = "slow_clk", "main_xtal";
};
rstc@fffffd00 {
@ -1049,7 +856,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
watchdog@fffffd40 {

4
arch/arm/boot/dts/at91sam9x25.dtsi
View File

@ -27,6 +27,10 @@
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};

4
arch/arm/boot/dts/at91sam9x35.dtsi
View File

@ -26,6 +26,10 @@
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
};

326
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -111,7 +111,7 @@
ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>;
clocks = <&ddrck>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>;
clock-names = "ddrck";
};
@ -124,269 +124,9 @@
compatible = "atmel,at91sam9x5-pmc", "syscon";
reg = <0xfffffc00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
clock-frequency = <12000000>;
clock-accuracy = <50000000>;
};
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91sam9x5-clk-main";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
clocks = <&main_rc_osc>, <&main_osc>;
};
plla: pllack {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <2000000 32000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <745000000 800000000 0 0
695000000 750000000 1 0
645000000 700000000 2 0
595000000 650000000 3 0
545000000 600000000 0 1
495000000 555000000 1 1
445000000 500000000 2 1
400000000 450000000 3 1>;
};
plladiv: plladivck {
compatible = "atmel,at91sam9x5-clk-plldiv";
#clock-cells = <0>;
clocks = <&plla>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKU>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91sam9x5-clk-master";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres;
};
usb: usbck {
compatible = "atmel,at91sam9x5-clk-usb";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
prog: progck {
compatible = "atmel,at91sam9x5-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
};
smd: smdclk {
compatible = "atmel,at91sam9x5-clk-smd";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
ddrck: ddrck {
#clock-cells = <0>;
reg = <2>;
clocks = <&mck>;
};
smdck: smdck {
#clock-cells = <0>;
reg = <4>;
clocks = <&smd>;
};
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
};
periphck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
pioAB_clk: pioAB_clk {
#clock-cells = <0>;
reg = <2>;
};
pioCD_clk: pioCD_clk {
#clock-cells = <0>;
reg = <3>;
};
smd_clk: smd_clk {
#clock-cells = <0>;
reg = <4>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <5>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <6>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <7>;
};
twi0_clk: twi0_clk {
reg = <9>;
#clock-cells = <0>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <10>;
};
twi2_clk: twi2_clk {
#clock-cells = <0>;
reg = <11>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <12>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <13>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <14>;
};
uart0_clk: uart0_clk {
#clock-cells = <0>;
reg = <15>;
};
uart1_clk: uart1_clk {
#clock-cells = <0>;
reg = <16>;
};
tcb0_clk: tcb0_clk {
#clock-cells = <0>;
reg = <17>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <18>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <19>;
};
dma0_clk: dma0_clk {
#clock-cells = <0>;
reg = <20>;
};
dma1_clk: dma1_clk {
#clock-cells = <0>;
reg = <21>;
};
uhphs_clk: uhphs_clk {
#clock-cells = <0>;
reg = <22>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <23>;
};
mci1_clk: mci1_clk {
#clock-cells = <0>;
reg = <26>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <28>;
};
};
#clock-cells = <2>;
clocks = <&clk32k>, <&main_xtal>;
clock-names = "slow_clk", "main_xtal";
};
reset_controller: rstc@fffffe00 {
@ -405,7 +145,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
sckc@fffffe50 {
@ -438,7 +178,7 @@
#size-cells = <0>;
reg = <0xf8008000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -448,7 +188,7 @@
#size-cells = <0>;
reg = <0xf800c000 0x100>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -457,7 +197,7 @@
reg = <0xffffec00 0x200>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
clocks = <&dma0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
clock-names = "dma_clk";
};
@ -466,7 +206,7 @@
reg = <0xffffee00 0x200>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
clocks = <&dma1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
clock-names = "dma_clk";
};
@ -864,7 +604,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioB: gpio@fffff600 {
@ -876,7 +616,7 @@
#gpio-lines = <19>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
};
pioC: gpio@fffff800 {
@ -887,7 +627,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
pioD: gpio@fffffa00 {
@ -899,7 +639,7 @@
#gpio-lines = <22>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
};
};
@ -912,7 +652,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
clock-names = "pclk";
status = "disabled";
};
@ -924,7 +664,7 @@
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx";
pinctrl-names = "default";
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "mci_clk";
#address-cells = <1>;
#size-cells = <0>;
@ -938,7 +678,7 @@
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx";
pinctrl-names = "default";
clocks = <&mci1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
clock-names = "mci_clk";
#address-cells = <1>;
#size-cells = <0>;
@ -954,7 +694,7 @@
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "usart";
status = "disabled";
};
@ -968,7 +708,7 @@
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
<&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "usart";
status = "disabled";
};
@ -982,7 +722,7 @@
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
<&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
@ -996,7 +736,7 @@
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -1012,7 +752,7 @@
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
status = "disabled";
};
@ -1027,7 +767,7 @@
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&twi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
status = "disabled";
};
@ -1042,7 +782,7 @@
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&twi2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
status = "disabled";
};
@ -1052,7 +792,7 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
clocks = <&uart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "usart";
status = "disabled";
};
@ -1063,7 +803,7 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
clocks = <&uart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "usart";
status = "disabled";
};
@ -1074,7 +814,7 @@
compatible = "atmel,at91sam9x5-adc";
reg = <0xf804c000 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&adc_clk>,
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
<&adc_op_clk>;
clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
@ -1121,7 +861,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
status = "disabled";
};
@ -1137,7 +877,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "spi_clk";
status = "disabled";
};
@ -1149,7 +889,7 @@
reg = <0x00500000 0x80000
0xf803c000 0x400>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&utmi>, <&udphs_clk>;
clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "hclk", "pclk";
status = "disabled";
@ -1229,7 +969,7 @@
compatible = "atmel,at91sam9rl-pwm";
reg = <0xf8034000 0x300>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
#pwm-cells = <3>;
status = "disabled";
};
@ -1239,7 +979,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -1248,7 +988,7 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&utmi>, <&uhphs_clk>;
clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "usb_clk", "ehci_clk";
status = "disabled";
};
@ -1266,7 +1006,7 @@
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {

18
arch/arm/boot/dts/at91sam9x5_can.dtsi
View File

@ -13,27 +13,13 @@
/ {
ahb {
apb {
pmc: pmc@fffffc00 {
periphck {
can0_clk: can0_clk {
#clock-cells = <0>;
reg = <29>;
};
can1_clk: can1_clk {
#clock-cells = <0>;
reg = <30>;
};
};
};
can0: can@f8000000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8000000 0x300>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
clocks = <&can0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
clock-names = "can_clk";
status = "disabled";
};
@ -44,7 +30,7 @@
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
clocks = <&can1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
clock-names = "can_clk";
status = "disabled";
};

11
arch/arm/boot/dts/at91sam9x5_isi.dtsi
View File

@ -44,22 +44,13 @@
};
};
pmc: pmc@fffffc00 {
periphck {
isi_clk: isi_clk {
#clock-cells = <0>;
reg = <25>;
};
};
};
isi: isi@f8048000 {
compatible = "atmel,at91sam9g45-isi";
reg = <0xf8048000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
clocks = <&isi_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
clock-names = "isi_clk";
status = "disabled";
port {

19
arch/arm/boot/dts/at91sam9x5_lcd.dtsi
View File

@ -17,7 +17,7 @@
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf8038000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
@ -143,23 +143,6 @@
};
};
};
pmc: pmc@fffffc00 {
periphck {
lcdc_clk: lcdc_clk {
#clock-cells = <0>;
reg = <25>;
};
};
systemck {
lcdck: lcdck {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
};
};
};
};
};

11
arch/arm/boot/dts/at91sam9x5_macb0.dtsi
View File

@ -43,22 +43,13 @@
};
};
pmc: pmc@fffffc00 {
periphck {
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <24>;
};
};
};
macb0: ethernet@f802c000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>;
clock-names = "hclk", "pclk";
status = "disabled";
};

11
arch/arm/boot/dts/at91sam9x5_macb1.dtsi
View File

@ -31,22 +31,13 @@
};
};
pmc: pmc@fffffc00 {
periphck {
macb1_clk: macb1_clk {
#clock-cells = <0>;
reg = <27>;
};
};
};
macb1: ethernet@f8030000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb1_rmii>;
clocks = <&macb1_clk>, <&macb1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 27>;
clock-names = "hclk", "pclk";
status = "disabled";
};

11
arch/arm/boot/dts/at91sam9x5_usart3.dtsi
View File

@ -42,15 +42,6 @@
};
};
pmc: pmc@fffffc00 {
periphck {
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <8>;
};
};
};
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x200>;
@ -60,7 +51,7 @@
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
status = "disabled";
};

670
arch/arm/boot/dts/sama5d2.dtsi
View File

@ -84,7 +84,7 @@
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x740000 0x1000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "apb_pclk";
in-ports {
@ -100,7 +100,7 @@
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x73C000 0x1000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
clock-names = "apb_pclk";
out-ports {
@ -154,7 +154,7 @@
reg = <0x00300000 0x100000
0xfc02c000 0x400>;
interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udphs_clk>, <&utmi>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
clock-names = "pclk", "hclk";
status = "disabled";
@ -281,7 +281,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -290,7 +290,7 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00500000 0x100000>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&utmi>, <&uhphs_clk>;
clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
clock-names = "usb_clk", "ehci_clk";
status = "disabled";
};
@ -314,7 +314,7 @@
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x10000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
status = "disabled";
nand_controller: nand-controller {
@ -333,7 +333,7 @@
compatible = "atmel,sama5d2-sdhci";
reg = <0xa0000000 0x300>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
clock-names = "hclock", "multclk", "baseclk";
status = "disabled";
};
@ -342,7 +342,7 @@
compatible = "atmel,sama5d2-sdhci";
reg = <0xb0000000 0x300>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
clock-names = "hclock", "multclk", "baseclk";
status = "disabled";
};
@ -362,7 +362,7 @@
compatible = "atmel,sama5d2-hlcdc";
reg = <0xf0000000 0x2000>;
interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
@ -388,7 +388,7 @@
compatible = "atmel,sama5d2-isc";
reg = <0xf0008000 0x4000>;
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 18>, <&pmc PMC_TYPE_GCK 46>;
clock-names = "hclock", "iscck", "gck";
#clock-cells = <0>;
clock-output-names = "isc-mck";
@ -398,7 +398,7 @@
ramc0: ramc@f000c000 {
compatible = "atmel,sama5d3-ddramc";
reg = <0xf000c000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "ddrck", "mpddr";
};
@ -407,7 +407,7 @@
reg = <0xf0010000 0x1000>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "dma_clk";
};
@ -417,7 +417,7 @@
reg = <0xf0004000 0x1000>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "dma_clk";
};
@ -425,559 +425,9 @@
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCRCS>;
clock-frequency = <12000000>;
clock-accuracy = <100000000>;
};
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91sam9x5-clk-main";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCSELS>;
clocks = <&main_rc_osc &main_osc>;
};
plla: pllack {
compatible = "atmel,sama5d3-clk-pll";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <12000000 12000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
};
plladiv: plladivck {
compatible = "atmel,at91sam9x5-clk-plldiv";
#clock-cells = <0>;
clocks = <&plla>;
};
audio_pll_frac: audiopll_fracck {
compatible = "atmel,sama5d2-clk-audio-pll-frac";
#clock-cells = <0>;
clocks = <&main>;
};
audio_pll_pad: audiopll_padck {
compatible = "atmel,sama5d2-clk-audio-pll-pad";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
audio_pll_pmc: audiopll_pmcck {
compatible = "atmel,sama5d2-clk-audio-pll-pmc";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKU>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91sam9x5-clk-master";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <124000000 166000000>;
atmel,clk-divisors = <1 2 4 3>;
};
h32ck: h32mxck {
#clock-cells = <0>;
compatible = "atmel,sama5d4-clk-h32mx";
clocks = <&mck>;
};
usb: usbck {
compatible = "atmel,at91sam9x5-clk-usb";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
prog: progck {
compatible = "atmel,at91sam9x5-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
ddrck: ddrck {
#clock-cells = <0>;
reg = <2>;
clocks = <&mck>;
};
lcdck: lcdck {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
iscck: iscck {
#clock-cells = <0>;
reg = <18>;
clocks = <&mck>;
};
};
periph32ck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&h32ck>;
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <5>;
atmel,clk-output-range = <0 83000000>;
};
tdes_clk: tdes_clk {
#clock-cells = <0>;
reg = <11>;
atmel,clk-output-range = <0 83000000>;
};
matrix1_clk: matrix1_clk {
#clock-cells = <0>;
reg = <14>;
};
hsmc_clk: hsmc_clk {
#clock-cells = <0>;
reg = <17>;
};
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <18>;
atmel,clk-output-range = <0 83000000>;
};
flx0_clk: flx0_clk {
#clock-cells = <0>;
reg = <19>;
atmel,clk-output-range = <0 83000000>;
};
flx1_clk: flx1_clk {
#clock-cells = <0>;
reg = <20>;
atmel,clk-output-range = <0 83000000>;
};
flx2_clk: flx2_clk {
#clock-cells = <0>;
reg = <21>;
atmel,clk-output-range = <0 83000000>;
};
flx3_clk: flx3_clk {
#clock-cells = <0>;
reg = <22>;
atmel,clk-output-range = <0 83000000>;
};
flx4_clk: flx4_clk {
#clock-cells = <0>;
reg = <23>;
atmel,clk-output-range = <0 83000000>;
};
uart0_clk: uart0_clk {
#clock-cells = <0>;
reg = <24>;
atmel,clk-output-range = <0 83000000>;
};
uart1_clk: uart1_clk {
#clock-cells = <0>;
reg = <25>;
atmel,clk-output-range = <0 83000000>;
};
uart2_clk: uart2_clk {
#clock-cells = <0>;
reg = <26>;
atmel,clk-output-range = <0 83000000>;
};
uart3_clk: uart3_clk {
#clock-cells = <0>;
reg = <27>;
atmel,clk-output-range = <0 83000000>;
};
uart4_clk: uart4_clk {
#clock-cells = <0>;
reg = <28>;
atmel,clk-output-range = <0 83000000>;
};
twi0_clk: twi0_clk {
reg = <29>;
#clock-cells = <0>;
atmel,clk-output-range = <0 83000000>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <30>;
atmel,clk-output-range = <0 83000000>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <33>;
atmel,clk-output-range = <0 83000000>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <34>;
atmel,clk-output-range = <0 83000000>;
};
tcb0_clk: tcb0_clk {
#clock-cells = <0>;
reg = <35>;
atmel,clk-output-range = <0 83000000>;
};
tcb1_clk: tcb1_clk {
#clock-cells = <0>;
reg = <36>;
atmel,clk-output-range = <0 83000000>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <38>;
atmel,clk-output-range = <0 83000000>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <40>;
atmel,clk-output-range = <0 83000000>;
};
uhphs_clk: uhphs_clk {
#clock-cells = <0>;
reg = <41>;
atmel,clk-output-range = <0 83000000>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <42>;
atmel,clk-output-range = <0 83000000>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <43>;
atmel,clk-output-range = <0 83000000>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <44>;
atmel,clk-output-range = <0 83000000>;
};
trng_clk: trng_clk {
#clock-cells = <0>;
reg = <47>;
atmel,clk-output-range = <0 83000000>;
};
pdmic_clk: pdmic_clk {
#clock-cells = <0>;
reg = <48>;
atmel,clk-output-range = <0 83000000>;
};
securam_clk: securam_clk {
#clock-cells = <0>;
reg = <51>;
};
i2s0_clk: i2s0_clk {
#clock-cells = <0>;
reg = <54>;
atmel,clk-output-range = <0 83000000>;
};
i2s1_clk: i2s1_clk {
#clock-cells = <0>;
reg = <55>;
atmel,clk-output-range = <0 83000000>;
};
can0_clk: can0_clk {
#clock-cells = <0>;
reg = <56>;
atmel,clk-output-range = <0 83000000>;
};
can1_clk: can1_clk {
#clock-cells = <0>;
reg = <57>;
atmel,clk-output-range = <0 83000000>;
};
classd_clk: classd_clk {
#clock-cells = <0>;
reg = <59>;
atmel,clk-output-range = <0 83000000>;
};
};
periph64ck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
dma0_clk: dma0_clk {
#clock-cells = <0>;
reg = <6>;
};
dma1_clk: dma1_clk {
#clock-cells = <0>;
reg = <7>;
};
aes_clk: aes_clk {
#clock-cells = <0>;
reg = <9>;
};
aesb_clk: aesb_clk {
#clock-cells = <0>;
reg = <10>;
};
sha_clk: sha_clk {
#clock-cells = <0>;
reg = <12>;
};
mpddr_clk: mpddr_clk {
#clock-cells = <0>;
reg = <13>;
};
matrix0_clk: matrix0_clk {
#clock-cells = <0>;
reg = <15>;
};
sdmmc0_hclk: sdmmc0_hclk {
#clock-cells = <0>;
reg = <31>;
};
sdmmc1_hclk: sdmmc1_hclk {
#clock-cells = <0>;
reg = <32>;
};
lcdc_clk: lcdc_clk {
#clock-cells = <0>;
reg = <45>;
};
isc_clk: isc_clk {
#clock-cells = <0>;
reg = <46>;
};
qspi0_clk: qspi0_clk {
#clock-cells = <0>;
reg = <52>;
};
qspi1_clk: qspi1_clk {
#clock-cells = <0>;
reg = <53>;
};
};
gck {
compatible = "atmel,sama5d2-clk-generated";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>;
sdmmc0_gclk: sdmmc0_gclk {
#clock-cells = <0>;
reg = <31>;
};
sdmmc1_gclk: sdmmc1_gclk {
#clock-cells = <0>;
reg = <32>;
};
tcb0_gclk: tcb0_gclk {
#clock-cells = <0>;
reg = <35>;
atmel,clk-output-range = <0 83000000>;
};
tcb1_gclk: tcb1_gclk {
#clock-cells = <0>;
reg = <36>;
atmel,clk-output-range = <0 83000000>;
};
pwm_gclk: pwm_gclk {
#clock-cells = <0>;
reg = <38>;
atmel,clk-output-range = <0 83000000>;
};
isc_gclk: isc_gclk {
#clock-cells = <0>;
reg = <46>;
};
pdmic_gclk: pdmic_gclk {
#clock-cells = <0>;
reg = <48>;
};
i2s0_gclk: i2s0_gclk {
#clock-cells = <0>;
reg = <54>;
};
i2s1_gclk: i2s1_gclk {
#clock-cells = <0>;
reg = <55>;
};
can0_gclk: can0_gclk {
#clock-cells = <0>;
reg = <56>;
atmel,clk-output-range = <0 80000000>;
};
can1_gclk: can1_gclk {
#clock-cells = <0>;
reg = <57>;
atmel,clk-output-range = <0 80000000>;
};
classd_gclk: classd_gclk {
#clock-cells = <0>;
reg = <59>;
atmel,clk-output-range = <0 100000000>;
};
};
i2s_clkmux {
compatible = "atmel,sama5d2-clk-i2s-mux";
#address-cells = <1>;
#size-cells = <0>;
i2s0muxck: i2s0_muxclk {
clocks = <&i2s0_clk>, <&i2s0_gclk>;
#clock-cells = <0>;
reg = <0>;
};
i2s1muxck: i2s1_muxclk {
clocks = <&i2s1_clk>, <&i2s1_gclk>;
#clock-cells = <0>;
reg = <1>;
};
};
#clock-cells = <2>;
clocks = <&clk32k>, <&main_xtal>;
clock-names = "slow_clk", "main_xtal";
};
qspi0: spi@f0020000 {
@ -985,7 +435,7 @@
reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
reg-names = "qspi_base", "qspi_mmap";
interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&qspi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -996,7 +446,7 @@
reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
reg-names = "qspi_base", "qspi_mmap";
interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&qspi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -1010,7 +460,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(30))>;
dma-names = "tx";
clocks = <&sha_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "sha_clk";
status = "okay";
};
@ -1026,7 +476,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(27))>;
dma-names = "tx", "rx";
clocks = <&aes_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "aes_clk";
status = "okay";
};
@ -1042,7 +492,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(7))>;
dma-names = "tx", "rx";
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
clock-names = "spi_clk";
atmel,fifo-size = <16>;
#address-cells = <1>;
@ -1061,7 +511,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(22))>;
dma-names = "tx", "rx";
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
clock-names = "pclk";
status = "disabled";
};
@ -1074,7 +524,7 @@
67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "hclk", "pclk";
status = "disabled";
};
@ -1085,7 +535,7 @@
#size-cells = <0>;
reg = <0xf800c000 0x100>;
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -1095,7 +545,7 @@
#size-cells = <0>;
reg = <0xf8010000 0x100>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb1_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -1103,7 +553,7 @@
compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
reg = <0xf8014000 0x1000>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -1123,7 +573,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 48>, <&pmc PMC_TYPE_GCK 48>;
clock-names = "pclk", "gclk";
status = "disabled";
};
@ -1139,7 +589,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(36))>;
dma-names = "tx", "rx";
clocks = <&uart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
clock-names = "usart";
status = "disabled";
};
@ -1155,7 +605,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(38))>;
dma-names = "tx", "rx";
clocks = <&uart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
clock-names = "usart";
status = "disabled";
};
@ -1171,7 +621,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(40))>;
dma-names = "tx", "rx";
clocks = <&uart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
clock-names = "usart";
status = "disabled";
};
@ -1189,7 +639,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
atmel,fifo-size = <16>;
status = "disabled";
};
@ -1199,7 +649,7 @@
reg = <0xf802c000 0x4000>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
};
sfr: sfr@f8030000 {
@ -1210,7 +660,7 @@
flx0: flexcom@f8034000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xf8034000 0x200>;
clocks = <&flx0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xf8034000 0x800>;
@ -1220,7 +670,7 @@
flx1: flexcom@f8038000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xf8038000 0x200>;
clocks = <&flx1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xf8038000 0x800>;
@ -1230,7 +680,7 @@
securam: sram@f8044000 {
compatible = "atmel,sama5d2-securam", "mmio-sram";
reg = <0xf8044000 0x1420>;
clocks = <&securam_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 51>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xf8044000 0x1420>;
@ -1255,7 +705,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xf8048030 0x10>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
clocks = <&h32ck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
};
watchdog@f8048040 {
@ -1292,10 +742,10 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
clock-names = "pclk", "gclk";
assigned-clocks = <&i2s0muxck>;
assigned-clock-parents = <&i2s0_gclk>;
assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
status = "disabled";
};
@ -1306,10 +756,10 @@
interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
<64 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-names = "int0", "int1";
clocks = <&can0_clk>, <&can0_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
clock-names = "hclk", "cclk";
assigned-clocks = <&can0_gclk>;
assigned-clock-parents = <&utmi>;
assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
status = "disabled";
@ -1326,7 +776,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(9))>;
dma-names = "tx", "rx";
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
clock-names = "spi_clk";
atmel,fifo-size = <16>;
#address-cells = <1>;
@ -1345,7 +795,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(42))>;
dma-names = "tx", "rx";
clocks = <&uart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
clock-names = "usart";
status = "disabled";
};
@ -1361,7 +811,7 @@
AT91_XDMAC_DT_PERID(44))>;
dma-names = "tx", "rx";
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&uart4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
clock-names = "usart";
status = "disabled";
};
@ -1369,7 +819,7 @@
flx2: flexcom@fc010000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xfc010000 0x200>;
clocks = <&flx2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xfc010000 0x800>;
@ -1379,7 +829,7 @@
flx3: flexcom@fc014000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xfc014000 0x200>;
clocks = <&flx3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xfc014000 0x800>;
@ -1389,7 +839,7 @@
flx4: flexcom@fc018000 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xfc018000 0x200>;
clocks = <&flx4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xfc018000 0x800>;
@ -1400,7 +850,7 @@
compatible = "atmel,at91sam9g45-trng";
reg = <0xfc01c000 0x100>;
interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&trng_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
};
aic: interrupt-controller@fc020000 {
@ -1424,7 +874,7 @@
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
atmel,fifo-size = <16>;
status = "disabled";
};
@ -1433,7 +883,7 @@
compatible = "atmel,sama5d2-adc";
reg = <0xfc030000 0x100>;
interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&adc_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
clock-names = "adc_clk";
dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
dma-names = "rx";
@ -1466,7 +916,7 @@
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
};
secumod@fc040000 {
@ -1485,7 +935,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(29))>;
dma-names = "tx", "rx";
clocks = <&tdes_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
clock-names = "tdes_clk";
status = "okay";
};
@ -1498,7 +948,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
clock-names = "pclk", "gclk";
status = "disabled";
};
@ -1514,10 +964,10 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(34))>;
dma-names = "tx", "rx";
clocks = <&i2s1_clk>, <&i2s1_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
clock-names = "pclk", "gclk";
assigned-clocks = <&i2s1muxck>;
assigned-parrents = <&i2s1_gclk>;
assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
assigned-parrents = <&pmc PMC_TYPE_GCK 55>;
status = "disabled";
};
@ -1528,10 +978,10 @@
interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
<65 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-names = "int0", "int1";
clocks = <&can1_clk>, <&can1_gclk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
clock-names = "hclk", "cclk";
assigned-clocks = <&can1_gclk>;
assigned-clock-parents = <&utmi>;
assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x1100 0 0 64 0 0 32 32>;
status = "disabled";

535
arch/arm/boot/dts/sama5d4.dtsi
View File

@ -137,7 +137,7 @@
reg = <0x00400000 0x100000
0xfc02c000 0x4000>;
interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&udphs_clk>, <&utmi>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
clock-names = "pclk", "hclk";
status = "disabled";
@ -264,7 +264,7 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@ -273,7 +273,7 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00600000 0x100000>;
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&utmi>, <&uhphs_clk>;
clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
clock-names = "usb_clk", "ehci_clk";
status = "disabled";
};
@ -297,7 +297,7 @@
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x8000000>;
clocks = <&mck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {
@ -327,7 +327,7 @@
compatible = "atmel,sama5d4-hlcdc";
reg = <0xf0000000 0x4000>;
interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
@ -356,7 +356,7 @@
reg = <0xf0004000 0x200>;
interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
clock-names = "dma_clk";
};
@ -366,7 +366,7 @@
interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
clocks = <&isi_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
clock-names = "isi_clk";
status = "disabled";
port {
@ -378,7 +378,7 @@
ramc0: ramc@f0010000 {
compatible = "atmel,sama5d3-ddramc";
reg = <0xf0010000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "ddrck", "mpddr";
};
@ -387,7 +387,7 @@
reg = <0xf0014000 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "dma_clk";
};
@ -395,448 +395,9 @@
compatible = "atmel,sama5d4-pmc", "syscon";
reg = <0xf0018000 0x120>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCRCS>;
clock-frequency = <12000000>;
clock-accuracy = <100000000>;
};
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCS>;
clocks = <&main_xtal>;
};
main: mainck {
compatible = "atmel,at91sam9x5-clk-main";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MOSCSELS>;
clocks = <&main_rc_osc &main_osc>;
};
plla: pllack {
compatible = "atmel,sama5d3-clk-pll";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKA>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <12000000 12000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
};
plladiv: plladivck {
compatible = "atmel,at91sam9x5-clk-plldiv";
#clock-cells = <0>;
clocks = <&plla>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_LOCKU>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91sam9x5-clk-master";
#clock-cells = <0>;
interrupt-parent = <&pmc>;
interrupts = <AT91_PMC_MCKRDY>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <125000000 200000000>;
atmel,clk-divisors = <1 2 4 3>;
};
h32ck: h32mxck {
#clock-cells = <0>;
compatible = "atmel,sama5d4-clk-h32mx";
clocks = <&mck>;
};
usb: usbck {
compatible = "atmel,at91sam9x5-clk-usb";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
prog: progck {
compatible = "atmel,at91sam9x5-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
};
smd: smdclk {
compatible = "atmel,at91sam9x5-clk-smd";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
ddrck: ddrck {
#clock-cells = <0>;
reg = <2>;
clocks = <&mck>;
};
lcdck: lcdck {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
smdck: smdck {
#clock-cells = <0>;
reg = <4>;
clocks = <&smd>;
};
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
};
periph32ck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&h32ck>;
pioD_clk: pioD_clk {
#clock-cells = <0>;
reg = <5>;
};
usart0_clk: usart0_clk {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <7>;
};
icm_clk: icm_clk {
#clock-cells = <0>;
reg = <9>;
};
aes_clk: aes_clk {
#clock-cells = <0>;
reg = <12>;
};
tdes_clk: tdes_clk {
#clock-cells = <0>;
reg = <14>;
};
sha_clk: sha_clk {
#clock-cells = <0>;
reg = <15>;
};
matrix1_clk: matrix1_clk {
#clock-cells = <0>;
reg = <17>;
};
hsmc_clk: hsmc_clk {
#clock-cells = <0>;
reg = <22>;
};
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <23>;
};
pioB_clk: pioB_clk {
#clock-cells = <0>;
reg = <24>;
};
pioC_clk: pioC_clk {
#clock-cells = <0>;
reg = <25>;
};
pioE_clk: pioE_clk {
#clock-cells = <0>;
reg = <26>;
};
uart0_clk: uart0_clk {
#clock-cells = <0>;
reg = <27>;
};
uart1_clk: uart1_clk {
#clock-cells = <0>;
reg = <28>;
};
usart2_clk: usart2_clk {
#clock-cells = <0>;
reg = <29>;
};
usart3_clk: usart3_clk {
#clock-cells = <0>;
reg = <30>;
};
usart4_clk: usart4_clk {
#clock-cells = <0>;
reg = <31>;
};
twi0_clk: twi0_clk {
reg = <32>;
#clock-cells = <0>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <33>;
};
twi2_clk: twi2_clk {
#clock-cells = <0>;
reg = <34>;
};
mci0_clk: mci0_clk {
#clock-cells = <0>;
reg = <35>;
};
mci1_clk: mci1_clk {
#clock-cells = <0>;
reg = <36>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <37>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <38>;
};
spi2_clk: spi2_clk {
#clock-cells = <0>;
reg = <39>;
};
tcb0_clk: tcb0_clk {
#clock-cells = <0>;
reg = <40>;
};
tcb1_clk: tcb1_clk {
#clock-cells = <0>;
reg = <41>;
};
tcb2_clk: tcb2_clk {
#clock-cells = <0>;
reg = <42>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <43>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <44>;
};
dbgu_clk: dbgu_clk {
#clock-cells = <0>;
reg = <45>;
};
uhphs_clk: uhphs_clk {
#clock-cells = <0>;
reg = <46>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <47>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <48>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <49>;
};
trng_clk: trng_clk {
#clock-cells = <0>;
reg = <53>;
};
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <54>;
};
macb1_clk: macb1_clk {
#clock-cells = <0>;
reg = <55>;
};
fuse_clk: fuse_clk {
#clock-cells = <0>;
reg = <57>;
};
securam_clk: securam_clk {
#clock-cells = <0>;
reg = <59>;
};
smd_clk: smd_clk {
#clock-cells = <0>;
reg = <61>;
};
twi3_clk: twi3_clk {
#clock-cells = <0>;
reg = <62>;
};
catb_clk: catb_clk {
#clock-cells = <0>;
reg = <63>;
};
};
periph64ck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
dma0_clk: dma0_clk {
#clock-cells = <0>;
reg = <8>;
};
cpkcc_clk: cpkcc_clk {
#clock-cells = <0>;
reg = <10>;
};
aesb_clk: aesb_clk {
#clock-cells = <0>;
reg = <13>;
};
mpddr_clk: mpddr_clk {
#clock-cells = <0>;
reg = <16>;
};
matrix0_clk: matrix0_clk {
#clock-cells = <0>;
reg = <18>;
};
vdec_clk: vdec_clk {
#clock-cells = <0>;
reg = <19>;
};
dma1_clk: dma1_clk {
#clock-cells = <0>;
reg = <50>;
};
lcdc_clk: lcdc_clk {
#clock-cells = <0>;
reg = <51>;
};
isi_clk: isi_clk {
#clock-cells = <0>;
reg = <52>;
};
};
#clock-cells = <2>;
clocks = <&clk32k>, <&main_xtal>;
clock-names = "slow_clk", "main_xtal";
};
mmc0: mmc@f8000000 {
@ -852,7 +413,7 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
clock-names = "mci_clk";
};
@ -869,7 +430,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
clocks = <&uart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
clock-names = "usart";
status = "disabled";
};
@ -887,7 +448,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(27))>;
dma-names = "tx", "rx";
clocks = <&ssc0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
clock-names = "pclk";
status = "disabled";
};
@ -897,7 +458,7 @@
reg = <0xf800c000 0x300>;
interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
status = "disabled";
};
@ -916,7 +477,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
clock-names = "spi_clk";
status = "disabled";
};
@ -936,7 +497,7 @@
pinctrl-0 = <&pinctrl_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
status = "disabled";
};
@ -955,7 +516,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
status = "disabled";
};
@ -965,7 +526,7 @@
#size-cells = <0>;
reg = <0xf801c000 0x100>;
interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -977,7 +538,7 @@
pinctrl-0 = <&pinctrl_macb0_rmii>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&macb0_clk>, <&macb0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
clock-names = "hclk", "pclk";
status = "disabled";
};
@ -997,7 +558,7 @@
pinctrl-0 = <&pinctrl_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&twi2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
status = "disabled";
};
@ -1019,7 +580,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
clocks = <&usart0_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
status = "disabled";
};
@ -1037,7 +598,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
clocks = <&usart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
status = "disabled";
};
@ -1055,7 +616,7 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mci1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
clock-names = "mci_clk";
};
@ -1072,7 +633,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
clocks = <&uart1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
clock-names = "usart";
status = "disabled";
};
@ -1090,7 +651,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
clocks = <&usart2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
clock-names = "usart";
status = "disabled";
};
@ -1108,7 +669,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
clock-names = "usart";
status = "disabled";
};
@ -1126,7 +687,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart4>;
clocks = <&usart4_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
clock-names = "usart";
status = "disabled";
};
@ -1144,7 +705,7 @@
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(29))>;
dma-names = "tx", "rx";
clocks = <&ssc1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
clock-names = "pclk";
status = "disabled";
};
@ -1164,7 +725,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&spi1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
clock-names = "spi_clk";
status = "disabled";
};
@ -1184,7 +745,7 @@
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
clocks = <&spi2_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
clock-names = "spi_clk";
status = "disabled";
};
@ -1195,7 +756,7 @@
#size-cells = <0>;
reg = <0xfc020000 0x100>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb1_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -1205,7 +766,7 @@
#size-cells = <0>;
reg = <0xfc024000 0x100>;
interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb2_clk>, <&clk32k>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
clock-names = "t0_clk", "slow_clk";
};
@ -1217,7 +778,7 @@
pinctrl-0 = <&pinctrl_macb1_rmii>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&macb1_clk>, <&macb1_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
clock-names = "hclk", "pclk";
status = "disabled";
};
@ -1226,14 +787,14 @@
compatible = "atmel,at91sam9g45-trng";
reg = <0xfc030000 0x100>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&trng_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
};
adc0: adc@fc034000 {
compatible = "atmel,at91sam9x5-adc";
reg = <0xfc034000 0x100>;
interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
clocks = <&adc_clk>,
clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
<&adc_op_clk>;
clock-names = "adc_clk", "adc_op_clk";
atmel,adc-channels-used = <0x01f>;
@ -1276,7 +837,7 @@
<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(40))>;
dma-names = "tx", "rx";
clocks = <&aes_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "aes_clk";
status = "okay";
};
@ -1290,7 +851,7 @@
<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(43))>;
dma-names = "tx", "rx";
clocks = <&tdes_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "tdes_clk";
status = "okay";
};
@ -1302,7 +863,7 @@
dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(44))>;
dma-names = "tx";
clocks = <&sha_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "sha_clk";
status = "okay";
};
@ -1311,7 +872,7 @@
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
reg = <0xfc05c000 0x1000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -1339,7 +900,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfc068630 0x10>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
clocks = <&h32ck>;
clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
};
watchdog: watchdog@fc068640 {
@ -1370,7 +931,7 @@
interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&dbgu_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
clock-names = "usart";
status = "disabled";
};
@ -1400,7 +961,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
};
pioB: gpio@fc06b000 {
@ -1411,7 +972,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
};
pioC: gpio@fc06c000 {
@ -1422,7 +983,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
};
pioD: gpio@fc068000 {
@ -1433,7 +994,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioD_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
};
pioE: gpio@fc06d000 {
@ -1444,7 +1005,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioE_clk>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
};
/* pinctrl pin settings */