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drm/nouveau/mxm: switch to instanced constructor 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-12-04 12:36:38 +10:00
parent 353108a49f
commit 0a7bff10ae
8 changed files with 44 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View File

@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_subdev *mxm;
struct nvkm_pci *pci;
struct nvkm_pmu *pmu;
struct nvkm_therm *therm;
@ -130,7 +129,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **);
int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **);
int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **);
int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **);

1
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
View File

@ -5,6 +5,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_IBUS , struct nvkm_subdev , ibus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GPIO , struct nvkm_gpio , gpio)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_I2C , struct nvkm_i2c , i2c)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MXM , struct nvkm_subdev , mxm)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MC , struct nvkm_mc , mc)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BUS , struct nvkm_bus , bus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_INSTMEM , struct nvkm_instmem , imem)

2
drivers/gpu/drm/nouveau/include/nvkm/subdev/mxm.h
View File

@ -3,5 +3,5 @@
#define __NVKM_MXM_H__
#include <core/subdev.h>
int nv50_mxm_new(struct nvkm_device *, int, struct nvkm_subdev **);
int nv50_mxm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **);
#endif

1
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View File

@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_MXM ] = "mxm",
[NVKM_SUBDEV_PCI ] = "pci",
[NVKM_SUBDEV_PMU ] = "pmu",
[NVKM_SUBDEV_THERM ] = "therm",

71
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View File

@ -822,7 +822,7 @@ nv50_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, nv50_mc_new },
.mmu = { 0x00000001, nv50_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = nv46_pci_new,
.therm = nv50_therm_new,
.timer = nv41_timer_new,
@ -929,7 +929,7 @@ nv84_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g84_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -961,7 +961,7 @@ nv86_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g84_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -993,7 +993,7 @@ nv92_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1025,7 +1025,7 @@ nv94_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1057,7 +1057,7 @@ nv96_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1089,7 +1089,7 @@ nv98_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g98_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1121,7 +1121,7 @@ nva0_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g84_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1153,7 +1153,7 @@ nva3_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, gt215_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
@ -1187,7 +1187,7 @@ nva5_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, gt215_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
@ -1220,7 +1220,7 @@ nva8_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, gt215_mc_new },
.mmu = { 0x00000001, g84_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
@ -1253,7 +1253,7 @@ nvaa_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g98_mc_new },
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1285,7 +1285,7 @@ nvac_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, g98_mc_new },
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
@ -1317,7 +1317,7 @@ nvaf_chipset = {
.imem = { 0x00000001, nv50_instmem_new },
.mc = { 0x00000001, gt215_mc_new },
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = g94_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
@ -1353,7 +1353,7 @@ nvc0_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf100_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1390,7 +1390,7 @@ nvc1_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1426,7 +1426,7 @@ nvc3_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1462,7 +1462,7 @@ nvc4_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf100_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1499,7 +1499,7 @@ nvc8_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf100_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1536,7 +1536,7 @@ nvce_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf100_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1573,7 +1573,7 @@ nvcf_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
@ -1609,7 +1609,7 @@ nvd7_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf106_pci_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@ -1644,7 +1644,7 @@ nvd9_chipset = {
.ltc = { 0x00000001, gf100_ltc_new },
.mc = { 0x00000001, gf100_mc_new },
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gf106_pci_new,
.pmu = gf119_pmu_new,
.therm = gf119_therm_new,
@ -1680,7 +1680,7 @@ nve4_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk104_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gk104_therm_new,
@ -1719,7 +1719,7 @@ nve6_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk104_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gk104_therm_new,
@ -1758,7 +1758,7 @@ nve7_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk104_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gk104_therm_new,
@ -1822,7 +1822,7 @@ nvf0_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk104_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gk104_therm_new,
@ -1860,7 +1860,7 @@ nvf1_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk104_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gk104_therm_new,
@ -1898,7 +1898,7 @@ nv106_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gk104_therm_new,
@ -1936,7 +1936,7 @@ nv108_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gk104_therm_new,
@ -1974,7 +1974,7 @@ nv117_chipset = {
.ltc = { 0x00000001, gm107_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.therm = gm107_therm_new,
@ -2010,7 +2010,7 @@ nv118_chipset = {
.ltc = { 0x00000001, gm107_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.therm = gm107_therm_new,
@ -2044,7 +2044,7 @@ nv120_chipset = {
.ltc = { 0x00000001, gm200_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gm200_pmu_new,
.therm = gm200_therm_new,
@ -2082,7 +2082,7 @@ nv124_chipset = {
.ltc = { 0x00000001, gm200_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gm200_pmu_new,
.therm = gm200_therm_new,
@ -2120,7 +2120,7 @@ nv126_chipset = {
.ltc = { 0x00000001, gm200_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = nv50_mxm_new,
.mxm = { 0x00000001, nv50_mxm_new },
.pci = gk104_pci_new,
.pmu = gm200_pmu_new,
.therm = gm200_therm_new,
@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_MXM , mxm);
_(NVKM_SUBDEV_PCI , pci);
_(NVKM_SUBDEV_PMU , pmu);
_(NVKM_SUBDEV_THERM , therm);

5
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c
View File

@ -230,7 +230,8 @@ nvkm_mxm = {
};
int
nvkm_mxm_new_(struct nvkm_device *device, int index, struct nvkm_mxm **pmxm)
nvkm_mxm_new_(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_mxm **pmxm)
{
struct nvkm_bios *bios = device->bios;
struct nvkm_mxm *mxm;
@ -240,7 +241,7 @@ nvkm_mxm_new_(struct nvkm_device *device, int index, struct nvkm_mxm **pmxm)
if (!(mxm = *pmxm = kzalloc(sizeof(*mxm), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&nvkm_mxm, device, index, &mxm->subdev);
nvkm_subdev_ctor(&nvkm_mxm, device, type, inst, &mxm->subdev);
data = mxm_table(bios, &ver, &len);
if (!data || !(ver = nvbios_rd08(bios, data))) {

5
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c
View File

@ -201,12 +201,13 @@ mxm_dcb_sanitise(struct nvkm_mxm *mxm)
}
int
nv50_mxm_new(struct nvkm_device *device, int index, struct nvkm_subdev **pmxm)
nv50_mxm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_subdev **pmxm)
{
struct nvkm_mxm *mxm;
int ret;
ret = nvkm_mxm_new_(device, index, &mxm);
ret = nvkm_mxm_new_(device, type, inst, &mxm);
if (mxm)
*pmxm = &mxm->subdev;
if (ret)

2
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/priv.h
View File

@ -12,5 +12,5 @@ struct nvkm_mxm {
u8 *mxms;
};
int nvkm_mxm_new_(struct nvkm_device *, int index, struct nvkm_mxm **);
int nvkm_mxm_new_(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_mxm **);
#endif