UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

drm/amd/powerplay: add Arcturus baco reset support 

Enable baco reset support on Arcturus.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2019-11-04 17:31:29 +08:00 committed by Alex Deucher
parent b4f8285a19
commit 0a650c1d35
3 changed files with 18 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/amd/amdgpu/soc15.c
View File

@ -559,6 +559,7 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
return AMD_RESET_METHOD_MODE2;
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_ARCTURUS:
soc15_asic_get_baco_capability(adev, &baco_reset);
break;
case CHIP_VEGA20:

7
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
View File

@ -495,6 +495,7 @@ static int arcturus_store_powerplay_table(struct smu_context *smu)
{
struct smu_11_0_powerplay_table *powerplay_table = NULL;
struct smu_table_context *table_context = &smu->smu_table;
struct smu_baco_context *smu_baco = &smu->smu_baco;
int ret = 0;
if (!table_context->power_play_table)
@ -507,6 +508,12 @@ static int arcturus_store_powerplay_table(struct smu_context *smu)
table_context->thermal_controller_type = powerplay_table->thermal_controller_type;
mutex_lock(&smu_baco->mutex);
if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO ||
powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)
smu_baco->platform_support = true;
mutex_unlock(&smu_baco->mutex);
return ret;
}

14
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -1642,7 +1642,9 @@ bool smu_v11_0_baco_is_support(struct smu_context *smu)
if (!baco_support)
return false;
if (!smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
/* Arcturus does not support this bit mask */
if (smu_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &&
!smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
return false;
val = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP0);
@ -1714,11 +1716,15 @@ out:
int smu_v11_0_baco_reset(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
int ret = 0;
ret = smu_v11_0_baco_set_armd3_sequence(smu, BACO_SEQ_BACO);
if (ret)
return ret;
/* Arcturus does not need this audio workaround */
if (adev->asic_type != CHIP_ARCTURUS) {
ret = smu_v11_0_baco_set_armd3_sequence(smu, BACO_SEQ_BACO);
if (ret)
return ret;
}
ret = smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_ENTER);
if (ret)