ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}
-common'ize macros for level 1 and level 2 interrupts Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta
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@ -76,9 +76,6 @@
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#define ECR_C_BIT_DTLB_LD_MISS 8
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#define ECR_C_BIT_DTLB_ST_MISS 9
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/* Dummy ECR values for Interrupts */
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#define event_IRQ1 0x0031abcd
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#define event_IRQ2 0x0032abcd
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/* Auxiliary registers */
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#define AUX_IDENTITY 4
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@ -465,55 +465,37 @@
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/* orig_r0, ECR, user_r25 skipped automatically */
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.endm
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/* Dummy ECR values for Interrupts */
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#define event_IRQ1 0x0031abcd
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#define event_IRQ2 0x0032abcd
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/*--------------------------------------------------------------
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* Save all registers used by interrupt handlers.
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*-------------------------------------------------------------*/
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.macro SAVE_ALL_INT1
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.macro INTERRUPT_PROLOGUE LVL
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/* free up r9 as scratchpad */
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PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg
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/* Which mode (user/kernel) was the system in when intr occurred */
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lr r9, [status32_l\LVL\()]
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SWITCH_TO_KERNEL_STK
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/* restore original r9 */
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PROLOG_RESTORE_REG r9, @int1_saved_reg
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PROLOG_RESTORE_REG r9, @int\LVL\()_saved_reg
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/* now we are ready to save the remaining context :) */
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st event_IRQ1, [sp, 8] /* Dummy ECR */
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/* now we are ready to save the remaining context */
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st 0x003\LVL\()abcd, [sp, 8] /* Dummy ECR */
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st 0, [sp, 4] /* orig_r0 , N/A for IRQ */
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SAVE_R0_TO_R12
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PUSH gp
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PUSH fp
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PUSH blink
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PUSH ilink1
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PUSHAX status32_l1
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PUSH ilink\LVL\()
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PUSHAX status32_l\LVL\()
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PUSH lp_count
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PUSHAX lp_end
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PUSHAX lp_start
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PUSHAX bta_l1
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.endm
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.macro SAVE_ALL_INT2
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/*
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* In SMP we can't use mem nor can we use SCRARCH_DATA0
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* as we do for int1 because int2 can clobber it
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* Hence 2 levels of intr are NOT allowed in SMP (by Kconfig)
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*/
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/* restore original r9 */
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PROLOG_RESTORE_REG r9, @int2_saved_reg
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/* now we are ready to save the remaining context :) */
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st event_IRQ2, [sp, 8] /* Dummy ECR */
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st 0, [sp, 4] /* orig_r0 , N/A for IRQ */
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SAVE_R0_TO_R12
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PUSH gp
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PUSH fp
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PUSH blink
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PUSH ilink2
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PUSHAX status32_l2
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PUSH lp_count
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PUSHAX lp_end
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PUSHAX lp_start
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PUSHAX bta_l2
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PUSHAX bta_l\LVL\()
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.endm
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/*--------------------------------------------------------------
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@ -525,17 +507,16 @@
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* for memory load operations. If used in that way interrupts are deffered
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* by hardware and that is not good.
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*-------------------------------------------------------------*/
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.macro RESTORE_ALL_INT1
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POPAX bta_l1
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.macro INTERRUPT_EPILOGUE LVL
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POPAX bta_l\LVL\()
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POPAX lp_start
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POPAX lp_end
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POP r9
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mov lp_count, r9 ;LD to lp_count is not allowed
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POPAX status32_l1
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POP ilink1
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POPAX status32_l\LVL\()
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POP ilink\LVL\()
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POP blink
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POP fp
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POP gp
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@ -545,26 +526,6 @@
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/* orig_r0, ECR, user_r25 skipped automatically */
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.endm
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.macro RESTORE_ALL_INT2
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POPAX bta_l2
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POPAX lp_start
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POPAX lp_end
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POP r9
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mov lp_count, r9 ;LD to lp_count is not allowed
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POPAX status32_l2
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POP ilink2
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POP blink
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POP fp
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POP gp
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RESTORE_R12_TO_R0
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ld sp, [sp] /* restore original sp */
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/* orig_r0, ECR, user_r25 skipped automatically */
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.endm
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/* Get CPU-ID of this core */
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.macro GET_CPU_ID reg
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lr \reg, [identity]
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@ -186,14 +186,7 @@ reserved: ; processor restart
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; ---------------------------------------------
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ENTRY(handle_interrupt_level2)
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; free up r9 as scratchpad
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PROLOG_FREEUP_REG r9, @int2_saved_reg
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;Which mode (user/kernel) was the system in when intr occured
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lr r9, [status32_l2]
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SWITCH_TO_KERNEL_STK
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SAVE_ALL_INT2
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INTERRUPT_PROLOGUE 2
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;------------------------------------------------------
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; if L2 IRQ interrupted a L1 ISR, disable preemption
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@ -233,13 +226,7 @@ END(handle_interrupt_level2)
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; ---------------------------------------------
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ENTRY(handle_interrupt_level1)
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PROLOG_FREEUP_REG r9, @int1_saved_reg
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;Which mode (user/kernel) was the system in when intr occured
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lr r9, [status32_l1]
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SWITCH_TO_KERNEL_STK
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SAVE_ALL_INT1
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INTERRUPT_PROLOGUE 1
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lr r0, [icause1]
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and r0, r0, 0x1f
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@ -698,7 +685,7 @@ not_exception:
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149:
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;return from level 2
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RESTORE_ALL_INT2
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INTERRUPT_EPILOGUE 2
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debug_marker_l2:
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rtie
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@ -709,8 +696,7 @@ not_level2_interrupt:
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bbit0 r10, STATUS_A1_BIT, not_level1_interrupt
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;return from level 1
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RESTORE_ALL_INT1
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INTERRUPT_EPILOGUE 1
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debug_marker_l1:
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rtie
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