ath9k_htc: Add multiple register read API
This would decrease latency in reading bulk registers. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -108,12 +108,14 @@ enum ath_cipher {
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* struct ath_ops - Register read/write operations
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* struct ath_ops - Register read/write operations
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*
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*
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* @read: Register read
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* @read: Register read
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* @multi_read: Multiple register read
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* @write: Register write
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* @write: Register write
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* @enable_write_buffer: Enable multiple register writes
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* @enable_write_buffer: Enable multiple register writes
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* @write_flush: flush buffered register writes and disable buffering
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* @write_flush: flush buffered register writes and disable buffering
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*/
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*/
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struct ath_ops {
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struct ath_ops {
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unsigned int (*read)(void *, u32 reg_offset);
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unsigned int (*read)(void *, u32 reg_offset);
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void (*multi_read)(void *, u32 *addr, u32 *val, u16 count);
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void (*write)(void *, u32 val, u32 reg_offset);
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void (*write)(void *, u32 val, u32 reg_offset);
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void (*enable_write_buffer)(void *);
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void (*enable_write_buffer)(void *);
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void (*write_flush) (void *);
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void (*write_flush) (void *);
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@ -297,6 +297,34 @@ static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
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return be32_to_cpu(val);
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return be32_to_cpu(val);
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}
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}
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static void ath9k_multi_regread(void *hw_priv, u32 *addr,
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u32 *val, u16 count)
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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__be32 tmpaddr[8];
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__be32 tmpval[8];
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int i, ret;
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for (i = 0; i < count; i++) {
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tmpaddr[i] = cpu_to_be32(addr[i]);
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}
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ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
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(u8 *)tmpaddr , sizeof(u32) * count,
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(u8 *)tmpval, sizeof(u32) * count,
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100);
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if (unlikely(ret)) {
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ath_dbg(common, ATH_DBG_WMI,
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"Multiple REGISTER READ FAILED (count: %d)\n", count);
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}
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for (i = 0; i < count; i++) {
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val[i] = be32_to_cpu(tmpval[i]);
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}
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}
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static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
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static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
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{
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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@ -407,6 +435,7 @@ static void ath9k_regwrite_flush(void *hw_priv)
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static const struct ath_ops ath9k_common_ops = {
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static const struct ath_ops ath9k_common_ops = {
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.read = ath9k_regread,
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.read = ath9k_regread,
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.multi_read = ath9k_multi_regread,
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.write = ath9k_regwrite,
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.write = ath9k_regwrite,
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.enable_write_buffer = ath9k_enable_regwrite_buffer,
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.enable_write_buffer = ath9k_enable_regwrite_buffer,
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.write_flush = ath9k_regwrite_flush,
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.write_flush = ath9k_regwrite_flush,
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@ -70,6 +70,9 @@
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#define REG_READ(_ah, _reg) \
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#define REG_READ(_ah, _reg) \
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ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
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ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
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#define REG_READ_MULTI(_ah, _addr, _val, _cnt) \
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ath9k_hw_common(_ah)->ops->multi_read((_ah), (_addr), (_val), (_cnt))
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#define ENABLE_REGWRITE_BUFFER(_ah) \
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#define ENABLE_REGWRITE_BUFFER(_ah) \
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do { \
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do { \
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if (ath9k_hw_common(_ah)->ops->enable_write_buffer) \
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if (ath9k_hw_common(_ah)->ops->enable_write_buffer) \
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