EDAC: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10

Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them.  This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2021-03-11 16:25:37 +01:00 committed by Dinh Nguyen
parent 2011431b97
commit 098da961d8
2 changed files with 12 additions and 7 deletions

View File

@ -396,7 +396,7 @@ config EDAC_THUNDERX
config EDAC_ALTERA config EDAC_ALTERA
bool "Altera SOCFPGA ECC" bool "Altera SOCFPGA ECC"
depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10) depends on EDAC=y && ARCH_INTEL_SOCFPGA
help help
Support for error detection and correction on the Support for error detection and correction on the
Altera SOCs. This is the global enable for the Altera SOCs. This is the global enable for the

View File

@ -1501,8 +1501,13 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
dci->mod_name = ecc_name; dci->mod_name = ecc_name;
dci->dev_name = ecc_name; dci->dev_name = ecc_name;
/* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly */ /*
#ifdef CONFIG_ARCH_STRATIX10 * Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly
*
* FIXME: Instead of ifdefs with different architectures the driver
* should properly use compatibles.
*/
#ifdef CONFIG_64BIT
altdev->sb_irq = irq_of_parse_and_map(np, 1); altdev->sb_irq = irq_of_parse_and_map(np, 1);
#else #else
altdev->sb_irq = irq_of_parse_and_map(np, 2); altdev->sb_irq = irq_of_parse_and_map(np, 2);
@ -1521,7 +1526,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
goto err_release_group_1; goto err_release_group_1;
} }
#ifdef CONFIG_ARCH_STRATIX10 #ifdef CONFIG_64BIT
/* Use IRQ to determine SError origin instead of assigning IRQ */ /* Use IRQ to determine SError origin instead of assigning IRQ */
rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq); rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);
if (rc) { if (rc) {
@ -1931,7 +1936,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
goto err_release_group1; goto err_release_group1;
} }
#ifdef CONFIG_ARCH_STRATIX10 #ifdef CONFIG_64BIT
/* Use IRQ to determine SError origin instead of assigning IRQ */ /* Use IRQ to determine SError origin instead of assigning IRQ */
rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq); rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);
if (rc) { if (rc) {
@ -2016,7 +2021,7 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = {
/************** Stratix 10 EDAC Double Bit Error Handler ************/ /************** Stratix 10 EDAC Double Bit Error Handler ************/
#define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m) #define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m)
#ifdef CONFIG_ARCH_STRATIX10 #ifdef CONFIG_64BIT
/* panic routine issues reboot on non-zero panic_timeout */ /* panic routine issues reboot on non-zero panic_timeout */
extern int panic_timeout; extern int panic_timeout;
@ -2109,7 +2114,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
altr_edac_a10_irq_handler, altr_edac_a10_irq_handler,
edac); edac);
#ifdef CONFIG_ARCH_STRATIX10 #ifdef CONFIG_64BIT
{ {
int dberror, err_addr; int dberror, err_addr;