drm/amd/display: Include names of all PP clock types

This fixes printing clock names in cases like:
[    5.352311] [drm] DM_PPLIB: values for Invalid clock
[    5.352313] [drm] DM_PPLIB:   400000 in kHz
[    5.352313] [drm] DM_PPLIB:   933000 in kHz
[    5.352314] [drm] DM_PPLIB:   1067000 in kHz
[    5.352315] [drm] DM_PPLIB:   1200000 in kHz
[    5.352317] [drm] DM_PPLIB: values for Invalid clock
[    5.352318] [drm] DM_PPLIB:   300000 in kHz
[    5.352318] [drm] DM_PPLIB:   600000 in kHz
[    5.352319] [drm] DM_PPLIB:   626000 in kHz
[    5.352320] [drm] DM_PPLIB:   654000 in kHz
(source: HP EliteBook 745 G5 w. RAVEN 0x1002:0x15DD 0x103C:0x83D5 0xD1)

On my system above "Invalid" names got replaced by "F" and "DCF".

The same problem was occurring on Huawei Matebook D with just 667000 kHz
instead of 400000 kHz.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rafał Miłecki 2019-01-13 14:24:07 +01:00 committed by Alex Deucher
parent 229f7b1d63
commit 0982a8fc2a
1 changed files with 9 additions and 1 deletions

View File

@ -82,7 +82,15 @@ enum dm_pp_clock_type {
#define DC_DECODE_PP_CLOCK_TYPE(clk_type) \
(clk_type) == DM_PP_CLOCK_TYPE_DISPLAY_CLK ? "Display" : \
(clk_type) == DM_PP_CLOCK_TYPE_ENGINE_CLK ? "Engine" : \
(clk_type) == DM_PP_CLOCK_TYPE_MEMORY_CLK ? "Memory" : "Invalid"
(clk_type) == DM_PP_CLOCK_TYPE_MEMORY_CLK ? "Memory" : \
(clk_type) == DM_PP_CLOCK_TYPE_DCFCLK ? "DCF" : \
(clk_type) == DM_PP_CLOCK_TYPE_DCEFCLK ? "DCEF" : \
(clk_type) == DM_PP_CLOCK_TYPE_SOCCLK ? "SoC" : \
(clk_type) == DM_PP_CLOCK_TYPE_PIXELCLK ? "Pixel" : \
(clk_type) == DM_PP_CLOCK_TYPE_DISPLAYPHYCLK ? "Display PHY" : \
(clk_type) == DM_PP_CLOCK_TYPE_DPPCLK ? "DPP" : \
(clk_type) == DM_PP_CLOCK_TYPE_FCLK ? "F" : \
"Invalid"
#define DM_PP_MAX_CLOCK_LEVELS 8