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arm64: dts: ti: k3-j721e-som-p0: Add HyperFlash node 

J721E SoM has a HyperFlash and HyperRam connected to HyperBus memory
controller, add corresponding node, pinmux and partitions for the same.
HyperBus is muxed with OSPI and only one controller can be active at a
time, therefore keep HyperBus node disabled. Bootloader will detect the
external mux state through a wkup gpio and enable the node as required.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513123313.11462-3-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Vaishnav Achath 2023-05-13 18:03:11 +05:30 committed by Vignesh Raghavendra
parent d93036b47f
commit 0979c0069c
1 changed files with 71 additions and 0 deletions
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71
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
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@ -165,6 +165,25 @@
J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
>;
};
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_CK */
J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_CKn */
J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_CSn0 */
J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* MCU_HYPERBUS0_CSn1 */
J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_RESETn */
J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* MCU_HYPERBUS0_RWDS */
J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ0 */
J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ1 */
J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ2 */
J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ3 */
J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ4 */
J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ5 */
J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ6 */
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* MCU_HYPERBUS0_DQ7 */
>;
};
};
&ospi0 {
@ -185,6 +204,58 @@
};
};
&hbmc {
/* OSPI and HBMC are muxed inside FSS, Bootloader will enable
* appropriate node based on board detection
*/
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
ranges = <0x00 0x00 0x05 0x00000000 0x4000000>, /* 64MB Flash on CS0 */
<0x01 0x00 0x05 0x04000000 0x800000>; /* 8MB RAM on CS1 */
flash@0,0 {
compatible = "cypress,hyperflash", "cfi-flash";
reg = <0x00 0x00 0x4000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "hbmc.tiboot3";
reg = <0x0 0x80000>;
};
partition@80000 {
label = "hbmc.tispl";
reg = <0x80000 0x200000>;
};
partition@280000 {
label = "hbmc.u-boot";
reg = <0x280000 0x400000>;
};
partition@680000 {
label = "hbmc.env";
reg = <0x680000 0x40000>;
};
partition@6c0000 {
label = "hbmc.sysfw";
reg = <0x6c0000 0x100000>;
};
partition@800000 {
label = "hbmc.rootfs";
reg = <0x800000 0x3800000>;
};
};
};
};
&mailbox0_cluster0 {
status = "okay";
interrupts = <436>;