powerpc/64e/interrupt: reconcile irq soft-mask state in C
Use existing 64s interrupt entry wrapper code to reconcile irqs in C. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210316104206.407354-7-npiggin@gmail.com
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@ -51,14 +51,14 @@ static inline void interrupt_enter_prepare(struct pt_regs *regs, struct interrup
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kuap_save_and_lock(regs);
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}
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#endif
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/*
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* Book3E reconciles irq soft mask in asm
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*/
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#ifdef CONFIG_PPC_BOOK3S_64
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#ifdef CONFIG_PPC64
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if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED)
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trace_hardirqs_off();
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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if (user_mode(regs)) {
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CT_WARN_ON(ct_state() != CONTEXT_USER);
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user_exit_irqoff();
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@ -117,13 +117,12 @@ BEGIN_FTR_SECTION
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END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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/*
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* RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
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* would clobber syscall parameters. Also we always enter with IRQs
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* enabled and nothing pending. system_call_exception() will call
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* trace_hardirqs_off().
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*
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* scv enters with MSR[EE]=1, so don't set PACA_IRQ_HARD_DIS. The
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* entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED.
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* scv enters with MSR[EE]=1 and is immediately considered soft-masked.
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* The entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED,
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* and interrupts may be masked and pending already.
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* system_call_exception() will call trace_hardirqs_off() which means
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* interrupts could already have been blocked before trace_hardirqs_off,
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* but this is the best we can do.
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*/
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/* Calling convention has r9 = orig r0, r10 = regs */
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@ -288,9 +287,8 @@ END_BTB_FLUSH_SECTION
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std r11,-16(r10) /* "regshere" marker */
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/*
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* RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
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* would clobber syscall parameters. Also we always enter with IRQs
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* enabled and nothing pending. system_call_exception() will call
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* We always enter kernel from userspace with irq soft-mask enabled and
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* nothing pending. system_call_exception() will call
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* trace_hardirqs_off().
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*/
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li r11,IRQS_ALL_DISABLED
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@ -409,28 +409,6 @@ exc_##n##_common: \
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#define EXCEPTION_COMMON_DBG(n) \
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EXCEPTION_COMMON_LVL(n, SPRN_SPRG_DBG_SCRATCH, PACA_EXDBG)
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/*
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* This is meant for exceptions that don't immediately hard-enable. We
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* set a bit in paca->irq_happened to ensure that a subsequent call to
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* arch_local_irq_restore() will properly hard-enable and avoid the
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* fast-path, and then reconcile irq state.
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*/
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#define INTS_DISABLE RECONCILE_IRQ_STATE(r3,r4)
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/*
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* This is called by exceptions that don't use INTS_DISABLE (that did not
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* touch irq indicators in the PACA). This will restore MSR:EE to it's
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* previous value
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*
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* XXX In the long run, we may want to open-code it in order to separate the
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* load from the wrtee, thus limiting the latency caused by the dependency
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* but at this point, I'll favor code clarity until we have a near to final
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* implementation
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*/
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#define INTS_RESTORE_HARD \
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ld r11,_MSR(r1); \
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wrtee r11;
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/* XXX FIXME: Restore r14/r15 when necessary */
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#define BAD_STACK_TRAMPOLINE(n) \
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exc_##n##_bad_stack: \
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@ -479,7 +457,6 @@ exc_##n##_bad_stack: \
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START_EXCEPTION(label); \
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NORMAL_EXCEPTION_PROLOG(trapnum, intnum, PROLOG_ADDITION_MASKABLE)\
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EXCEPTION_COMMON(trapnum) \
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INTS_DISABLE; \
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ack(r8); \
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CHECK_NAPPING(); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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@ -559,7 +536,6 @@ __end_interrupts:
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mfspr r14,SPRN_DEAR
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mfspr r15,SPRN_ESR
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EXCEPTION_COMMON(0x300)
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INTS_DISABLE
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b storage_fault_common
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/* Instruction Storage Interrupt */
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@ -569,7 +545,6 @@ __end_interrupts:
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li r15,0
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mr r14,r10
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EXCEPTION_COMMON(0x400)
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INTS_DISABLE
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b storage_fault_common
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/* External Input Interrupt */
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@ -591,7 +566,6 @@ __end_interrupts:
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PROLOG_ADDITION_1REG)
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mfspr r14,SPRN_ESR
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EXCEPTION_COMMON(0x700)
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INTS_DISABLE
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std r14,_DSISR(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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ld r14,PACA_EXGEN+EX_R14(r13)
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@ -610,8 +584,7 @@ __end_interrupts:
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beq- 1f
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bl load_up_fpu
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b fast_interrupt_return
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1: INTS_DISABLE
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addi r3,r1,STACK_FRAME_OVERHEAD
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1: addi r3,r1,STACK_FRAME_OVERHEAD
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bl kernel_fp_unavailable_exception
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b interrupt_return
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@ -631,7 +604,6 @@ BEGIN_FTR_SECTION
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1:
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif
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INTS_DISABLE
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl altivec_unavailable_exception
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b interrupt_return
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@ -642,7 +614,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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BOOKE_INTERRUPT_ALTIVEC_ASSIST,
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x220)
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INTS_DISABLE
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addi r3,r1,STACK_FRAME_OVERHEAD
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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@ -691,7 +662,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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NORMAL_EXCEPTION_PROLOG(0xf20, BOOKE_INTERRUPT_AP_UNAVAIL,
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0xf20)
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INTS_DISABLE
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl unknown_exception
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b interrupt_return
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@ -827,7 +797,6 @@ kernel_dbg_exc:
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*/
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mfspr r14,SPRN_DBSR
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EXCEPTION_COMMON_DBG(0xd08)
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INTS_DISABLE
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std r14,_DSISR(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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ld r14,PACA_EXDBG+EX_R14(r13)
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@ -840,7 +809,6 @@ kernel_dbg_exc:
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NORMAL_EXCEPTION_PROLOG(0x260, BOOKE_INTERRUPT_PERFORMANCE_MONITOR,
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x260)
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INTS_DISABLE
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CHECK_NAPPING()
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl performance_monitor_exception
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x2c0)
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addi r3,r1,STACK_FRAME_OVERHEAD
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INTS_RESTORE_HARD
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bl unknown_exception
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b interrupt_return
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x310)
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addi r3,r1,STACK_FRAME_OVERHEAD
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INTS_RESTORE_HARD
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bl unknown_exception
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b interrupt_return
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x320)
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addi r3,r1,STACK_FRAME_OVERHEAD
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INTS_RESTORE_HARD
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bl unknown_exception
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b interrupt_return
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x340)
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addi r3,r1,STACK_FRAME_OVERHEAD
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INTS_RESTORE_HARD
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bl unknown_exception
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b interrupt_return
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@ -991,7 +955,6 @@ alignment_more:
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addi r3,r1,STACK_FRAME_OVERHEAD
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ld r14,PACA_EXGEN+EX_R14(r13)
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ld r15,PACA_EXGEN+EX_R15(r13)
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INTS_RESTORE_HARD
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bl alignment_exception
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REST_NVGPRS(r1)
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b interrupt_return
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