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spi: Fixes for v6.3 

A small set of fixes for SPI drivers, Krishna has been doing a bunch of
 work on Tegra210 QuadSPI and found a bunch of issues there and there's
 a couple of small fixes for other drivers too.
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Merge tag 'spi-fix-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A small set of fixes for SPI drivers, Krishna has been doing a bunch
  of work on Tegra210 QuadSPI and found a bunch of issues there and
  there's a couple of small fixes for other drivers too"

* tag 'spi-fix-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: tegra210-quad: Fix iterator outside loop
  spi: tegra210-quad: Fix validate combined sequence
  spi: tegra210-quad: set half duplex flag
  spi: spi-sn-f-ospi: fix duplicate flag while assigning to mode_bits
  spi: cadence-quadspi: Fix cancel the indirect read mask
This commit is contained in:
Linus Torvalds 2023-03-02 09:25:38 -08:00
parent fd7ee8de98 2449d43668
commit 093b2dc402
3 changed files with 12 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/spi/spi-cadence-quadspi.c
View File

@ -786,7 +786,7 @@ failrd:
writel(0, reg_base + CQSPI_REG_IRQMASK);
/* Cancel the indirect read */
writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK,
writel(CQSPI_REG_INDIRECTRD_CANCEL_MASK,
reg_base + CQSPI_REG_INDIRECTRD);
return ret;
}

2
drivers/spi/spi-sn-f-ospi.c
View File

@ -611,7 +611,7 @@ static int f_ospi_probe(struct platform_device *pdev)
return -ENOMEM;
ctlr->mode_bits = SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL
| SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_OCTAL
| SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL
| SPI_MODE_0 | SPI_MODE_1 | SPI_LSB_FIRST;
ctlr->mem_ops = &f_ospi_mem_ops;
ctlr->bus_num = -1;

15
drivers/spi/spi-tegra210-quad.c
View File

@ -1156,6 +1156,10 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
ret = -EIO;
goto exit;
}
if (!xfer->cs_change) {
tegra_qspi_transfer_end(spi);
spi_transfer_delay_exec(xfer);
}
break;
default:
ret = -EINVAL;
@ -1164,14 +1168,14 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
msg->actual_length += xfer->len;
transfer_phase++;
}
if (!xfer->cs_change) {
tegra_qspi_transfer_end(spi);
spi_transfer_delay_exec(xfer);
}
ret = 0;
exit:
msg->status = ret;
if (ret < 0) {
tegra_qspi_transfer_end(spi);
spi_transfer_delay_exec(xfer);
}
return ret;
}
@ -1297,7 +1301,7 @@ static bool tegra_qspi_validate_cmb_seq(struct tegra_qspi *tqspi,
if (xfer->len > 4 || xfer->len < 3)
return false;
xfer = list_next_entry(xfer, transfer_list);
if (!tqspi->soc_data->has_dma || xfer->len > (QSPI_FIFO_DEPTH << 2))
if (!tqspi->soc_data->has_dma && xfer->len > (QSPI_FIFO_DEPTH << 2))
return false;
return true;
@ -1532,6 +1536,7 @@ static int tegra_qspi_probe(struct platform_device *pdev)
master->mode_bits = SPI_MODE_0 | SPI_MODE_3 | SPI_CS_HIGH |
SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD;
master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
master->flags = SPI_CONTROLLER_HALF_DUPLEX;
master->setup = tegra_qspi_setup;
master->transfer_one_message = tegra_qspi_transfer_one_message;
master->num_chipselect = 1;