staging: comedi: pcl730: clean up the register map documentation
This driver supports a number of simple digital i/o boards with slight variations in the register map. Clean up the comment about the register map to better document the driver. Remove the #define's used for the registers since thet don't apply to all the board variations supported by the driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -32,19 +32,46 @@
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#include <linux/ioport.h>
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/*
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* Register I/O map
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* Register map
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*
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* The pcm3730 PC/104 board does not have the PCL730_IDIO_HI register.
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* The pcl725 ISA board uses separate registers for isolated digital I/O.
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* The p8r8dio, acl7225b, and p16r16dio boards have isolated digital output
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* readback and separate registers for isolated digital I/O.
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* The pcl733 ISA board uses all four registers for isolated digital inputs.
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* The pcl734 ISA board uses all four registers for isolated digital outputs.
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* The register map varies slightly depending on the board type but
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* all registers are 8-bit.
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*
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* The boardinfo 'io_range' is used to allow comedi to request the
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* proper range required by the board.
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*
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* The comedi_subdevice 'private' data is used to pass the register
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* offset to the (*insn_bits) functions to read/write the correct
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* registers.
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*
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* The basic register mapping looks like this:
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*
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* BASE+0 Isolated outputs 0-7 (write) / inputs 0-7 (read)
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* BASE+1 Isolated outputs 8-15 (write) / inputs 8-15 (read)
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* BASE+2 TTL outputs 0-7 (write) / inputs 0-7 (read)
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* BASE+3 TTL outputs 8-15 (write) / inputs 8-15 (read)
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*
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* The pcm3730 board does not have register BASE+1.
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*
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* The pcl725 and p8r8dio only have registers BASE+0 and BASE+1:
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*
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* BASE+0 Isolated outputs 0-7 (write) (read back on p8r8dio)
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* BASE+1 Isolated inputs 0-7 (read)
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*
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* The acl7225b and p16r16dio boards have this register mapping:
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*
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* BASE+0 Isolated outputs 0-7 (write) (read back)
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* BASE+1 Isolated outputs 8-15 (write) (read back)
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* BASE+2 Isolated inputs 0-7 (read)
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* BASE+3 Isolated inputs 8-15 (read)
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*
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* The pcl733 and pcl733 boards have this register mapping:
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*
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* BASE+0 Isolated outputs 0-7 (write) or inputs 0-7 (read)
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* BASE+1 Isolated outputs 8-15 (write) or inputs 8-15 (read)
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* BASE+2 Isolated outputs 16-23 (write) or inputs 16-23 (read)
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* BASE+3 Isolated outputs 24-31 (write) or inputs 24-31 (read)
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*/
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#define PCL730_IDIO_LO 0 /* Isolated Digital I/O low byte (ID0-ID7) */
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#define PCL730_IDIO_HI 1 /* Isolated Digital I/O high byte (ID8-ID15) */
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#define PCL730_DIO_LO 2 /* TTL Digital I/O low byte (D0-D7) */
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#define PCL730_DIO_HI 3 /* TTL Digital I/O high byte (D8-D15) */
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struct pcl730_board {
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const char *name;
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@ -217,7 +244,7 @@ static int pcl730_attach(struct comedi_device *dev,
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = pcl730_do_insn_bits;
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s->private = (void *)PCL730_IDIO_LO;
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s->private = (void *)0;
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/* get the initial state if supported */
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if (board->has_readback)
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@ -233,9 +260,8 @@ static int pcl730_attach(struct comedi_device *dev,
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = pcl730_di_insn_bits;
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s->private = board->is_acl7225b ? (void *)PCL730_DIO_LO :
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board->is_pcl725 ? (void *)PCL730_IDIO_HI
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: (void *)PCL730_IDIO_LO;
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s->private = board->is_acl7225b ? (void *)2 :
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board->is_pcl725 ? (void *)1 : (void *)0;
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}
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if (board->has_ttl_io) {
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@ -247,7 +273,7 @@ static int pcl730_attach(struct comedi_device *dev,
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = pcl730_do_insn_bits;
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s->private = (void *)PCL730_DIO_LO;
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s->private = (void *)2;
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/* TTL Digital Inputs */
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s = &dev->subdevices[subdev++];
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@ -257,7 +283,7 @@ static int pcl730_attach(struct comedi_device *dev,
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = pcl730_di_insn_bits;
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s->private = (void *)PCL730_DIO_LO;
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s->private = (void *)2;
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}
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return 0;
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