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powerpc/powernv: Reserve PE#0 on NPU 

P8+ hardware reports all errors on PE#0. This patch ensures PE#0 is
not assigned to NPU devices so that it can be used for EEH.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Alistair Popple 2016-01-11 16:53:50 +11:00 committed by Michael Ellerman
parent b521549a09
commit 08f48f3234
1 changed files with 4 additions and 2 deletions
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6
arch/powerpc/platforms/powernv/pci-ioda.c
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@ -1186,9 +1186,11 @@ static void pnv_pci_ioda_setup_PEs(void)
* functions. PCI bus dependent PEs are required for the * functions. PCI bus dependent PEs are required for the
* remaining types of PHBs. * remaining types of PHBs.
*/ */
if (phb->type == PNV_PHB_NPU) if (phb->type == PNV_PHB_NPU) {
/* PE#0 is needed for error reporting */
pnv_ioda_reserve_pe(phb, 0);
pnv_ioda_setup_npu_PEs(hose->bus); pnv_ioda_setup_npu_PEs(hose->bus);
else } else
pnv_ioda_setup_PEs(hose->bus); pnv_ioda_setup_PEs(hose->bus);
} }
} }